FPGA simulation of a port
Posted 13 July 2009 - 09:02 PM
I am trying to simulate a FPGA VI with a "normal" VI. Up to now that is working quite well, but now I have weird effects reading a port. One Port (8Bits) is read out from two(!) different parts of the FPGA VI. The one part is using the higher 4 bits and the other is using the lower bits. With the Simulation I try to count these Nibbles up or down separately. The nibbles should wrap around. (E.g. 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1...). The problem in my simulation is that sometimes, especially in the beginning, one step is left out (e.g. 0 1 3 4 5). This error is not happening if I am disabling one of the parts of the FPGA VI where the port is read out. So if the port is only read out from one(!) part in the FPGA VI, it works without these "errors". The most important parts of the simulation VI ist attached. I hope someone can help.
Posted 14 July 2009 - 12:31 AM
Time prevents me from looking at it too close, but I'll bet that if you get rid of the globals or rigorously control when they get written and read, that your problem will clear.
Edited by JohnRH, 14 July 2009 - 12:32 AM.
Posted 14 July 2009 - 05:48 PM
Moreover the simulation is only working, if I am using these global variables (which are also used in the tutorial from National Instrument: http://zone.ni.com/r...bench_tutorial/)! If I am using a local variable to change the data, nothing happens not even a local indicator changes!
Posted 15 July 2009 - 07:26 PM
0 () 6 () 4 2 1 7 6 4 2 0 6 4 2 ...
or a little bit different like this:
0 () 6() 4 2 0 6 4 2 0 7 5 ...
What I would expect is: 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1....
The brakets () show that the numbers in this case where moving too fast (why? I dont know). The other numbers later are changing, as specified with the delay, every 500ms.
I dont have a solution for this weird behaviour, but I found a workaround. I just changed one PortA blocks in the FPGA with another free port (e.g. PortB). And made another case frame in the simulation VI. Now everything works as expected.
PS.: Ignore the comment below my picture. It was generated from LabView.
Edited by werner, 15 July 2009 - 07:27 PM.
Posted 03 August 2009 - 09:54 PM
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