61 replies to this topic

[eaolson]

Over at some other thread, crelf said, " I strongly suggest that this topic go to a new thread." And, lo, there was a new thread.

So when is it a good and bad idea to use a sequence structure? Should they be banned outright? Even removed from the language? Personally, I think they should be discouraged, are often bad style, but are occasionally necessary.

Just the other day, I wrote this:

I genuinely don't see any way to guarantee proper execution order without the sequence structure. I usually find the only time I ever use them is when I'm using a LabVIEW node where I can't enforce data flow any other way, e.g. with Wait.

[Omar Mussa]

QUOTE (eaolson @ Aug 21 2008, 08:08 AM)

Over at some other thread, crelf said, " I strongly suggest that this topic go to a new thread." And, lo, there was a new thread.

So when is it a good and bad idea to use a sequence structure? Should they be banned outright?

The are occasionally necessary to help enforce data flow. For this reason alone, they should not be banned. But they should be avoided for almost all other cases in my opinion due to their inflexibility.

[Tom Bress]

QUOTE (eaolson @ Aug 21 2008, 11:08 AM)

Over at some other thread, crelf said, " I strongly suggest that this topic go to a new thread." And, lo, there was a new thread.

So when is it a good and bad idea to use a sequence structure? Should they be banned outright? Even removed from the language? Personally, I think they should be discouraged, are often bad style, but are occasionally necessary.

genuinely don't see any way to guarantee proper execution order without the sequence structure. I usually find the only time I ever use them is when I'm using a LabVIEW node where I can't enforce data flow any other way, e.g. with Wait.

I typically take the offending non-error-propagating native function and wrap it in a sub-vi wrapper that has error cluster propagation, like the OpenG Wait function. Then I can use it in the future as well without resorting to sequence structures.

[PaulG.]

Occasionally I will run an output from a subVI into a single frame sequence in order to probe it. STACKED sequences, on the other hand, should be banned outright!

[Val Brown]

QUOTE (Tom Bress @ Aug 21 2008, 08:46 AM)

I typically take the offending non-error-propagating native function and wrap it in a sub-vi wrapper that has error cluster propagation, like the OpenG Wait function. Then I can use it in the future as well without resorting to sequence structures.

I favor this approach as well. In prior versions (LV 5 maybe 6) there were rumors of extra overhead when using this kind of process instead of sequence structures but I don't think the overhead of a sub-vi call is an issue any longer.

[TobyD]

QUOTE (eaolson @ Aug 21 2008, 08:08 AM)

I genuinely don't see any way to guarantee proper execution order without the sequence structure. I usually find the only time I ever use them is when I'm using a LabVIEW node where I can't enforce data flow any other way, e.g. with Wait.

I agree with Tom on this one. It's would be best to wrap it as a subVI, but if you insist on using the sequence structure there is still no need to wrap everything. It is only necessary to place the "offending non-error-propagating native function" inside the sequence structure.

[mross]

QUOTE (TobyD @ Aug 21 2008, 12:13 PM)

I agree with Tom on this one. It's would be best to wrap it as a subVI, but if you insist on using the sequence structure there is still no need to wrap everything. It is only necessary to place the "offending non-error-propagating native function" inside the sequence structure.

I don't see why this is any better or worse.

The sequence as used by eaolson has none of the problems associated with sequences, it is simple, it obscures nothing, it saves time in wiring, it doesn't take up useless space, so there is no reason to ban it. Making a wrapper is just anal if there is no re-use planned.

I am betting we all know a bad use of the sequence structure when we see one, this isn't egregious by any means.

I don't use real time so i can't comment about that.

[David Wisti]

If your an FPGA programmer, you know sequence structures are not going anywhere. Having a sequence structure to enforce dataflow uses less space on the FPGA.

[LAVA 1.0 Content]

I still use multi-frame flat seq structure for benchmarking (get time - test - get time). Under most cicumstances the time required to pass an error cluster is small but if I'm trying time something that takes as much time as it takes to pass the error cluster, then it will be hard to determine how much time was taken by each.

And before we get off on another tangent...

I have managed to measure the time difference between using a sub-VI with "extra" connectors and an identicle VI with no "extra" connectors, so for my work, it does make a difference.

Ben

[mross]

QUOTE (David Wisti @ Aug 21 2008, 12:29 PM)

If your an FPGA programmer, you know sequence structures are not going anywhere. Having a sequence structure to enforce dataflow uses less space on the FPGA.

Perahps I will expose my ignorance now, but it won't be the first time...

Are you saying that wires don't work the same way for FPGA?

One generally doesn't "enforce dataflow," one lets it happen, because that is better.

Is this no longer true in FPGA and if so how does FPGA work and why should it be treated differently than "regular" LabVIEW programming which benefits from data flow, not sequencing.

Mike

[TobyD]

QUOTE (mross @ Aug 21 2008, 09:25 AM)

I don't see why this is any better or worse.

I agree that in this example it makes little difference, but I think we have all seen examples where a large vi will be completely "sequence structured" so that a single vi can run at the proper time. Generally this method of wrapping a single vi in a sequence structure is less intrusive to the block diagram and still forces the programmer to be conscious of dataflow in the rest of the program.

[jpdrolet]

When the main loop of a VI doesn't require a state machine, I often put a three frame flat sequence structure |init|doit|exit| even when I could use data flow. That clearly separates the code that doesn't belong to the main work of the VI. However, if the VI requires a state machine, I use init and exit states.

[David Wisti]

QUOTE (mross @ Aug 21 2008, 12:36 PM)

Perahps I will expose my ignorance now, but it won't be the first time...

Are you saying that wires don't work the same way for FPGA?

One generally doesn't "enforce dataflow," one lets it happen, because that is better.

Is this no longer true in FPGA and if so how does FPGA work and why should it be treated differently than "regular" LabVIEW programming which benefits from data flow, not sequencing.

Mike

Wires work the same in fpga. But, if you have a situation where dataflow needs to be enforced, creating a wire and a corresponding data type and in/out terminals would take more FPGA space then just the enable string of a sequence structure. In FPGA, you could be trying to implement your code in the smallest footprint. Using sequence structures would allow you to optimize for size.

[mross]

QUOTE (David Wisti @ Aug 21 2008, 01:12 PM)

Wires work the same in fpga. But, if you have a situation where dataflow needs to be enforced, creating a wire and a corresponding data type and in/out terminals would take more FPGA space then just the enable string of a sequence structure. In FPGA, you could be trying to implement your code in the smallest footprint. Using sequence structures would allow you to optimize for size.

you said:
"a wire and a corresponding data type and in/out terminals would take more FPGA space then just the enable string of a sequence structure."

Just what is this "space" you are talking about? Screen space? The space of available gates? My first thought is that you mean visual real estate on a block diagram.

Is this text programming? Like I said I don't savvy FPGA. I thought FPGA were programmed on a big monitor where wires and sequence structres mean the same thing as they do for regular DAQ equipment and programming. I have no idea what the "enable string of a sequence struture" might be.

Mike

[John Lokanis]

There is always a way to avoid the sequence structure...

[PJM_labview]

QUOTE (mross @ Aug 21 2008, 10:46 AM)

you said:
"a wire and a corresponding data type and in/out terminals would take more FPGA space then just the enable string of a sequence structure."

Just what is this "space" you are talking about? Screen space? The space of available gates? My first thought is that you mean visual real estate on a block diagram.

Is this text programming? Like I said I don't savvy FPGA. I thought FPGA were programmed on a big monitor where wires and sequence structres mean the same thing as they do for regular DAQ equipment and programming. I have no idea what the "enable string of a sequence struture" might be.

Mike

I believe he his talking about space on the FPGA. From what I recall from a training I got on this topic (and this was a while ago), usage of sequence structure is "recommended" when creating code for the FPGA because it will result in more optimized code deployed on the target.

PJM

[Aristos Queue]

The Sequence Structure and Flat Sequence Structure should be placed in a restricted palette that can only be accessed with a security code that is given to you when you complete LV Intermediate. It would also automatically unlock after you have been using LV for one year.

I'm joking, of course, but my point is that sequences are something that should never be used until you know enough to know when they should be used.

[LAVA 1.0 Content]

Back to the topic of seq frames...

I also use them when I am preparing to create a sub-VI. I can wire up all of the inputs that I will need in the sub-VI to the seq frame and then create a sub-VI from the seq frame. This gets all of my controls on the FP of the sub-VI. But after I create the sub-VI I remove the seq frame.

Another case...

I had out-lawed multi-frame stacked seq structures in our shop until I saw how another developer had used a two frame seq structure. She put all of the code in the first frame and she pasted an image of the code's design in the second. This was really clever since all I had to do was reach up and switch frames to refernce her design.

Ben

[Neville D]

QUOTE (Aristos Queue @ Aug 21 2008, 11:36 AM)

I'm joking, of course, but my point is that sequences are something that should never be used until you know enough to know when they should be used.

Heheh... like the 3-button dialog VI..

Neville.

[mross]

QUOTE (PJM_labview @ Aug 21 2008, 02:01 PM)

I believe he his talking about space on the FPGA. From what I recall from a training I got on this topic (and this was a while ago), usage of sequence structure is "recommended" when creating code for the FPGA because it will result in more optimized code deployed on the target.

PJM

I think get it, we have apples and anchors here? FPGA is not compiled code that is optimized to use dataflow. It is just straight up sequences and go to's?

QUOTE (Neville D @ Aug 21 2008, 02:47 PM)

Heheh... like the 3-button dialog VI..

Neville.

That is classic. You could delete the sequence and lose nothing, and it adds nothing functionally. So the value added by the effort to apply the structure and work around inside it is purely theorectical. It is more graphic art than programming.

At least it is documented with notes. Come to think of it text notes could replace the sequence, just pull them out to big rectangles and move everything else in font of them.

I think subVis would have been more appropriate.