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ExpoEra

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Posts posted by ExpoEra

  1. QUOTE (LV_FPGA_SE @ Sep 10 2008, 08:44 PM)

    It turns out the IO references are somewhat specific to the type of IO device. My original VI was created for cRIO IO. I updated the example for R series and have attached the new VIs and project.

    Thanks. Let's give it a try. :yes:

  2. QUOTE (LV_FPGA_SE @ Sep 10 2008, 01:13 PM)

    What I/O modules and channels have you configured? Can you attach a screen shot of the project with the configuration or the project file.

    Make sure the VIs are assigned to the same FPGA target in the project.

    e9uqec.jpg

    The folders saying Connector 0, 1, etc have the I/Os in them.

  3. QUOTE (LV_FPGA_SE @ Sep 9 2008, 11:26 AM)

    You should first create a new project and configure your FPGA target and all of the I/O for your target that you plan to use. Then add the two VIs to the FPGA target. Open up the Use 8 Channels and help it find the subVI if necessary.

    Then if you go to the diagram you should be able to click on the I/O references and select any of the channels you have configured in the project for your FPGA target.

    Yea, I did all of those. The strange part is that when I click on the I/O references, it says "No I/O Available". I am very sure I have configured the I/O for my target correctly. :(

  4. QUOTE (LV_FPGA_SE @ Sep 9 2008, 11:01 AM)

    You could wrap 96 DIO values into three U32 integers and keep the interface very simple. On the FPGA you can convert each U32 into an array of Booleans to pass to the I/O node. The same works for inputs as well. Converting a U32 into an array of 32 Booleans on the FPGA takes no additional time or space as the U32 is really an array of 32 bits already. It is simply a different representation in LabVIEW, but not on the FPGA.

    This could be useful. :thumbup:

  5. QUOTE (LV_FPGA_SE @ Jun 26 2008, 08:11 AM)

    I'm just catching up on some older messages.

    Another possible solution to this problem is to use I/O references (new in LV FPGA) in the subVI and specify the I/O channel as constants in the calling VI. The subVI does not need to change and the user can specify the specific I/O in a clear readable fashion. You cannot put the I/O references into an array to pass to the subVI, but you can bundle them in a cluster. I have attached a very simple example for 8 DI channels.

    For the "Use 8 Channels", how do I use it? When I try to compile it, it says channel not found. When I actually assign a channel to it, the wire between the cluster and subVI becomes broken.

  6. QUOTE (ned @ Sep 9 2008, 06:38 AM)

    Are you trying to open a reference to a subVI, or to the top-level VI? I don't think you'll be able to open a reference to a subVI if you've only compiled the top-level VI. Are you loading the appropriate VI into the FPGA and running it? Have you probed the error outputs from the Open Reference, Read/Write, etc functions, and if so, what error occurs?

    I only compiles the top-level VI, and I open the reference to the top level VI. I use only call the subVI from the top-level VI.

  7. Hello,

    I have a few FPGA VI's that contains AI, AO, or DO (the way I wanted to group them). Now, I have put these FPGA VI's as sub VI's in a top-level FPGA VI, and have linked them up like you normally would in other non FPGA Labview programs. Then, I would compile it, and put a Open Reference, Read/Write, Close Reference, in the RT VI. And.... it doesn't work. Obviously, I am doing something wrong.

    Can someone teach me how to do it? It would be rather crazy to try to fit all 96 DIO controls into one top-level FPGA VI. Thank you.

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