I have a question regarding to FPGA FIFO, specifically DMA from Host to Target (FPGA).
As an Example, I have a 1D array containing 10x2000 elements stored inside the host side Buffer.
At the FPGA side, I want to use 'host to target-read' to read fixed amount of elements from the host side buffer, for example exact 2000 elements. Moreover I want to hold onto the data (2000 elements) for a certain amount of time (example 10s) before reading again 2000 elements from the buffer.
Reading fixed size of elements using FPGA FIFO
in Application Design & Architecture
Posted
Dear All,
I have a question regarding to FPGA FIFO, specifically DMA from Host to Target (FPGA).
As an Example, I have a 1D array containing 10x2000 elements stored inside the host side Buffer.
At the FPGA side, I want to use 'host to target-read' to read fixed amount of elements from the host side buffer, for example exact 2000 elements. Moreover I want to hold onto the data (2000 elements) for a certain amount of time (example 10s) before reading again 2000 elements from the buffer.
Does anyone have a clue how to do this?
Thank you so much!
Yang