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Ehsan Rezaei

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Posts posted by Ehsan Rezaei

  1. Thank you guys for your useful points. We have Windows 7 and we do not update that. I did not change anything on the code or device. 

    The only issue before the error happening is that I obviously can see a time lag of about 3 seconds on my signals. It means, when I trige the device, in my HEKA Patchmaster software i can see the Time-Displacement signal of the piezoelectric actuator, but the same thing will show up in my LabVIEW after 3 seconds. When this delays build up on eachother then I get error-66.

     

    Main.vi_ScreenShot.tif

  2. Main-vi.tifHi Rolf,

    The IT department check my PC and FPGA network connection and they confirmed that all good from that side. They said the error is becasue of the PC-FPGA connection. 

    However the code worked well for a couple of months, I think now one of my PC or FPGA are slow, so they cannot shake hands, and consequently the code assumes that as "peer closed connection". I have added all the diagram on my Main.vi. Please tell me what would be the first step of debugging the code?Main-Main.tif 

    Main-vi.tif Main-Try_to_Connect.tif Main-Idle.tif Main-Initialization.tif Main-StopConnection.tif

  3. Thanks for your reply, Rolf.

    The code is written with an undergrad in our lab about 7 years ago. I have no knowledge or experience of LabVIEW.

    I just performed some experiments with the machine, and suddenly got the ERROR-66 from nowhere. 

    Best,

    Ehsan

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