fpga interactive mode in multiple develeloper environments

[cbl]

Multiple developers creating LabVIEW code for Windows, NI-RT and NI-FPGA, all code kept in SVN. Multiple working environments with numerous windows computers, NI Real-Time Hardware Targets and ethernet networks (ie, company (169.xxx.xxx.xxx), local (192.xxx.xxx.xxx) and hardware (10.xxx.xxx.xxx)). Experiencing that the FPGA Interactive mode does not work in numerous situations (ie, the FPGA code requires to be recompiled before using FPGA Interactive mode), with shared (again this is thru via SVN) LVprojects with the code and .lvbitx files.

 

Best I could find via google is this idea exchange posting that describes a perceived defect in this area (change in IP address of NI Real-Time Hardware Target - and am going to investigate if this is the root cause of the experienced issues):

http://forums.ni.com/t5/LabVIEW-Idea-Exchange/Enabling-use-Labview-FPGA-front-panel-in-interactive-mode/idi-p/2012956

 

As asked in the above link, is this different IP issue a defect? Any insights or experiences to share regarding this described situation?

 

I've cross posted this to ni forum as well, to increase exposure.

Thanks for your time - Chris

http://forums.ni.com/t5/LabVIEW/FPGA-interactive-mode-in-multiple-develeloper-environments/td-p/3184841

[MarkCG]

I never understood the logic behind that causes the "bitfile signature does not match" message that forces recompile if you are opening the fpga reference by build specification or by VI. it caused me great annoyance as I was learning the LV FPGA side of things. The ip address should have nothing to do with it but it seems to, also when you pull a copy of the project from the source code repo it wants a recompile. Why? I think that if the hardware in the project matches the bitfile it should not complain.

 

 

I just gave up and just open a reference to the bitfile exclusively. With custom fpga code on ethercat targets I erase the fpga and download the bitfile directly via right clicking on the fpga target in the project.