lavalolo Posted June 29, 2005 Report Share Posted June 29, 2005 [ LabVIEW 7.1.1 , FPGA Module 1.1 ] Hi, i have an very annoying effect when programming a host VI to control an existing fpga VI. On each click, loop, read/write control, that i place on the block diagramm, the windows sand glass appears for several seconds forcing me to wait ...... Anyone an idea why ??? Andreas Quote Link to comment
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