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Warning 10612 ?


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Hi All,

I have a DAQ program which read from/write to 5 DIO cards. Sometimes the following error is reported by DIO Port Write:

-----------------------------------------------------

Warning 10612 occurred at an unidentified location.

Possible reasons:

NI-DAQ LV: The specified line does not support the specified transfer direction.

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However, I don't understand why it happens and only SOMETIMES, but not at other times.

Thanks!!!

Raymond

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You are trying to write to a digital port that only supports reads. We would have to see the logic inside your VI to see why it only happens sporadically, but it would be more useful for you to debug and locate which port/card is causing the error and investigate why there is a write to that port.

HTH

-- orko

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You are trying to write to a digital port that only supports reads. We would have to see the logic inside your VI to see why it only happens sporadically, but it would be more useful for you to debug and locate which port/card is causing the error and investigate why there is a write to that port.

HTH

-- orko

Thanks, orko!

But the cards I am using are pci6601/6602, which are supposed to support input AND output. I am wondering whether it is possible that when my program sometimes accidentally read AND write at the SAME time sometimes?

The program is not with me now. I will upload that in a few hours when I go to the lab.

However, I can explain a little bit the logic:

The error happens at the "handshaking" between the program and a piece of hardware. The hardware is actually a radiation detector, when it detects a radiation, a "trigger" signal will be sent to the program. The program then reads all the data obtained by the detector and then send a "reset" signal to the detector (this is where the error occurs sometimes).

Hope it explains a little more.

Raymond

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The program you uploaded has a broken arrow on my box at "Write to 1 Dig Line(653x).vi" since the subVI "vi.lib\Daq\1easyio.llb\Write to Digital Line.vi" appears to have changed from LV6.1 to LV7.1 and doesn't output an error cluster anymore. Its been replaced in the connector pane with an "iteration" input, so this breaks the linkage in LV7.1. I don't have LV6.1 to compare the two for other changes, but this most likely isn't the problem.

Wait...now I'm confused. I thought you had the pci 6601/6602? If so, why are you using the 653x VI's? Have you tried the ones located Here?

Another thing I noticed is that you are configuring your port for a 8-bit port width initially (in the main loop) but I couldn't figure out why. Also, during your resets you are using port width=32 which is right, But if you set your "line for reset" greater than 0 that would try to write to line 32 and above which are reserved for counter outputs (according to the manual). I noticed you had line for reset=1...with a port width of 32, that would try and reset lines 1-32, wouldn't it?

The above mentioned 660x VIs take care of this math a little better IMO since they just read/write from all lines at once using masks, with constants set to the right port width/lines for the device.

HTH,

-- orko

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