Using SCC CTR pulse train as sample clock for SCC Digital Out

[Phil Duncan]

Hi all,

I am having a very furstrating time trying to get a digital ouput to remain high for a certain number if pulses (from a pulse train) generated by a counter. Both the counter and digital ouput are modules in a SCC-2345 carrier. I am using a PCI-6221 card to communicate to the SCC but so far I have not had to refer to the card in my code. I would like to keep it that way.

I have read articles like this one http://zone.ni.com/devzone/cda/epd/p/id/4455 that refer to routing the counter output to PFI12 etc but I cannot get the sample clock to see the counter output from the counter module as a valid source for timing the digital output line.

Thanks in advance for you help.

Cheers & Beers

:thumbup: :beer: