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Running a Host VI outside of a Project


dthomson

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I've got a small program running on a cRIO unit. I've just upgraded from 7.1 to 8.20, so I'm not quite clear on how the new project paradigm should be used. The problem is that there is a PC-hosted interface to the FPGA program. If I open the project that was used to build both the FPGA program and the host program, then open and run the host program, everything is fine. If I open the host program by itself, without opening the project, I get errors (something like "FPGA reference opened outside of the project".) This makes sense, since the project is (I believe) where the FPGA hardware description is stored. However, it is less than ideal for the end-user.

When a non-LV end-user wants to run the system, it was possible on LV 7.1 for them to just open the host program and run it. Now they need to open the project, navigate to the host program, then open that and run it. Doesn't sound like a big deal, but the extra steps are an annoyance, and the reasons for it aren't obvious to the end-user.

The only work-around I've found so far is to build the host program into an .exe. That seems to do the trick. Now they can double-click on the .exe and it runs fine, outside of LV. Then they run another LV program on the PC and things are working. I don't really like this option, though, since at some point I might want the 2nd LV program to communicate with the Host program so as to interact directly with the FPGA program. Having the Host program in an .exe makes this more difficult.

Is there any other way to use the Build Specs or some other trick to create a version of the Host program that can be run inside LV without having to open the project first?

Thanks,

Dave

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