Sorry, I should have been more specific. To my knowledge, if an FPGA file is not opened through a LV project (as in lvproj file) it is not edited as an FPGA file. As a result, the project file must be check out and then updated every time you want to edit an FPGA file. Additionally, should two members need to edit FPGA files at the same time, the lvproj file will develop a conflict.