king_cluster

I've attached an example project demonstrating how to create a project that can run on two different targets. Oddly, the issue that I was having requiring me to recompile the FPGA while switching between targets hasn't occurred in this sample project. Additionally, when I created the FPGA reference on the RT, I did not need to do a dynamic type cast, I simply selected the "correct" FPGA when configuring open FPGA VI reference, which should be noted, is from the correct target. Dual Targets.zip

In the RT I create a reference and configure it to the FGPA VI and select dynamic. The I use a dynamic FPGA interface cast to cast it to a type def, that defines all my indicators, controls, and FIFOs. HOWEVER, the problem occurs, without even running the RT code. Simply attempting to run the FPGA code on one target and then on the other requires me to recompile, even without modifying the FPGA code. I'm not sure what breaks, I just assumed/hoped that I was doing something wrong. I've been focusing my troubleshooting efforts on the definition of the FIFO, which are currently defined on both the targets to be the same. One thing that I did notice is a loading of some sort of niFPGAfifoemulation stuff, unfortunately I haven't caught exactly what it is, because it loads too fast. I will try to capture some more data to help everyone understand the issue. Thanks!

Awesome topic! I've added conditional disables so that I could merge cRIO code and sbRIO code. So now I have one FGPA program and I created a project with two targets (cRIO/sbRIO). However, when I compile one, it breaks the other. So, I can't just switch between the two, without recompiling. Any ideas of what I could be doing wrong? The project uses FIFOs, Memory, and Registers, which I have defined in under both targets in the project. THANKS!