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王佳

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    LabVIEW 2019
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    2023

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  1. Thank you for your continued help and advice. I'll think about it myself and learn to implement it on FPGA. Thanks!🙂
  2. I think I know what I need, but I can't seem to describe it accurately. I'm sorry.😭
  3. I know about bilinear interpolation. But I don't know how to do it with my lack of data points. The hollow points in the graph are known points and the solid points are the points to be interpolated, (Hollow points don't have some kind of linear relationship) I don't know how to use bilinear interpolation. I am not able to find 4 known points.
  4. These graphs are just an example, and sometimes the slope may not be a constant. I would now like to tell you about my idea or need. This kind of graph above is done by planning in advance, I know the correspondence between each group (X,C) and W. I need to read the value of X and C from two encoders to find the corresponding value of W. But since it is ideal, the values of X and C are divided equally, for example, the value of X is 10 and divided into 10 parts, each with an interval of 1, but the values I read from the encoders may be 1.1 or 2.3, 3.5, etc., and the same goes for the value of C! And the values of X and C can't correspond to each other, so I can't just interpolate X or C in one dimension to get W. So I think I should find the corresponding W value by interpolating in two dimensions, but I don't know how to do it. I've only implemented one-dimensional interpolation via lookup tables so far. Anyway, thank you very much for your reply and help!🥳
  5. If my requirement does not include the case of negative numbers, can I use the procedure I wrote above.
  6. I seem to have implemented this feature. Using the module round toward-infinity. That should do it, right?🤨
  7. I'm sorry, I probably didn't phrase it very well. As you can see in this graph, each value of X and C corresponds to a value of W, that is, a set of (X,C) determines a W. After sampling the data on this graph, the value of (X,C) that I get now may not correspond exactly to the sampled points. At this point, I need to perform a 2D interpolation to get the W value. This is my idea, not sure if I have expressed it clearly, thanks anyway!
  8. I'm sorry, I probably didn't phrase it very well. As you can see in this graph, each value of X and C corresponds to a value of W, that is, a set of (X,C) determines a W. After sampling the data on this graph, the value of (X,C) that I get now may not correspond exactly to the sampled points. At this point, I need to perform a 2D interpolation to get the W value. This is my idea, not sure if I have expressed it clearly, thanks anyway!
  9. Firstly thank you very much for your reply! My idea is simple, input a fixed point number and how to output its integer part separately from its decimal part. For example, if the input is 1.5, the output will be 1 and 0.5.🤪
  10. Please give me some advice and help, thanks guys!
  11. The point (1,1) corresponds to the value 1, the point (2,2) corresponds to the value 2, when I get the point (0.5,0.5) I need to output the value 0.5, similar to this interpolation😐
  12. Firstly, thank you very much for your reply. Please forgive me for uploading the wrong image, what I meant to upload was actually this. Its name is Discrete Transfer Function Direct VI. Also could you please tell me which transfer function is expressed in the example you gave? I'm sorry. I'm probably stupid.
  13. Can I use this module directly? Is it possible to implement a control algorithm by discretising all the transfer functions in the graph and representing them with this module?
  14. Thank you very much for your reply! I'm using a compact RIO.I have to implement this control algorithm on the FPGA side. May I ask how this is realized as you said( break it down into developing your own nth order derivative and integral functions) Can you give me a simple example? thanks.😃
  15. Can you please tell me how to implement this kind of control with transfer function in FPGA module? I can't find any function about transfer function in FPGA! Thanks a lot guys!
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