Input Data from Parallel port?

[arteta]

I have read the instruction from NI about using Status Lines and Control Lines to import data from parallel port but there's some point that i does not understand.

http://zone.ni.com/devzone/conceptd.nsf/we...6256B1800794596

As U can see in the picture below. 4 upper bit of the Status Register was map to be the D7 to D4 and 4 Lower Bit of the Control Reg -> D3 to D0. But i don't know why there are somekind of "Not Gate"? in the latter 4 Lines. I have try it directly and only the Status's 4 Bits response. So i think that these "Not gate" is must_be. Can anyone helping me about this, what is that icon and what is "O.C", what kind of IC must i use to do it.

[K1200LT rider]

The triangles with dots are inverters (a common IC). OC means open collector. You would have to use an inverter with an open collector type output (these are also common) for what is pictured in fig 5. You can also use NAND or NOR gate chips as inverters by connecting both inputs of each gate together.

I looked at the link you gave for ni.com, and this is what I gave for feedback on that page:

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In fig 5 I am not sure what D0-D7 are. Are they D0-D7 of the parallel port? If so, why are you connecting them to status and control lines on the same port, especially when you are saying that you can't depend on a parallel port being bidirectional? Without looking at the VIs and reading more than this article, I have to assume D0-D7 are digital I/O lines of a DAQ card that are interfaced to the status and control lines of a parallel port. Is that correct? The text surrounding fig 5 is not clear about this at all.

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I have read the instruction from NI about using Status Lines and Control Lines to import data from parallel port but there's some point that i does not understand.

http://zone.ni.com/devzone/conceptd.nsf/we...6256B1800794596

As U can see in the picture below. 4 upper bit of the Status Register was map to be the D7 to D4 and 4 Lower Bit of the Control Reg -> D3 to D0. But i don't know why there are somekind of "Not Gate"? in the latter 4 Lines. I have try it directly and only the Status's 4 Bits response. So i think that these "Not gate" is must_be. Can anyone helping me about this, what is that icon and what is "O.C", what kind of IC must i use to do it.

[arteta]

I've used the OC inverter 7406 IC to and then the input work. I think the reason for using it is about the pull up resistors. thank you for helping me!