Multi Core Multi DAQ

[EJW]

Allright, this is a relatively simple application, yet i want it to be MODERN and take advantage of the fact that all my systems now use dual core processors. I understand that the new timed loops in 8.5 have the ability to assign a processor or processor core to each loop. Though i dont understand why its not available on the standard while loop.

I am working on a new machine that has taken an old test and split it into two stations to do a new part. (It is impractical mechanically to try and do it in one station).

So, station one tests the top of the part, station two tests the bottom of the part. Both stations are rotating off of a single drive motor with an encoder attached to the bottom of each stations drive shaft.

I use the encoder as an external timing source connected to CLK0 and i also jumper the input to PFI0 for triggering. Now I am acquiring at the exact rate the motor is going (12 bit encoder - 4096pts per rev).

Unfortuantely I am only measuring one analog input channel for each test, yet i have two independent timing sources so i have to use two DAQ cards (6251m). What a waste of channels, oh well.

My program needs to wait for a start signal on each daq card D0.0, now most of the time there is a part in both stations, but when the machine is being run manually or first starting up, there may not be one in one of the stations. When i have acquired my data (4096 points) i need to process this data, write results to a file, display results to the front panel and send an output back to the machines plc as to

whether or not the part is good/bad or if there was a fault (D0.1 TEST COMPLETE, D0.2 TEST ACCEPT, D0.3 TEST FAULT)

The processing of the data should probably be done in parallel. I also need to be able to have some front panel control to change a handful of settings.

My thinking is this... Two Timed while loops (producer loops), set one for core 0, one for core 1. One While Loop to handle Control/DIO/FP DISPLAY/File handling, and two While loops for processing (consumers).

The timeout state should probably include an event structure to handle FP settings changes, and the timoute event could handle polling the Start lines.

Upon receiving the start signal i could send notification to the appropriate timed while loop which would cause my data acquisition to occur. The Timed loop would be using an internal clock for acquiring instantaneous single point readings while not actually in test mode.

When the Read has finished the data is output to a queue which of course triggers the consumer loops.

Now for the part that i need help with... 1st.. should the consumer loops display my results and do my file writing, or should it be done in the control loop. 2nd. if results are done in the control loop, how do i then let the control loop know i am done and pass the data back to it and so it knows which indicators to use (station 1 or 2). When an individual stations work is done, how do i determine which one is done so as to fire the appropriate D0.x on the right card?

Also, does using the timed loops like mentioned make since, especially since i am always acquring data, be it single point during a time out or an array of data from an actual test. By the way, i have that functioning.. switching between single point interallly clocked to multipoint externally clocked and back again.

Attached is an image of what i have started, now some of the code you will see is there just for test purposes only, not actual design. What is not pictured are the two identical (empty) consumer loops with a deque element (array data) in it.