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Richard Jennings

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About Richard Jennings

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  1. 1,812 downloads

    Virtual Logic Analyzer Copyright © 2007, Richard Jennings All rights reserved. Richard Jennings Author: Richard Jennings --see readme file for contact information Description: The Virtual Logic Analyzer is a development tool for monitoring VI execution. It is especially useful for optimizing the performance of multi-threaded, parallel applications. Monitoring Data and Timing information over an entire application can provide unexpected insight into performance bottlenecks. The VLA Probes use the OOP model Stepan Riha of NI introduced at NIWeek 97 and the Virtual Logic Analyzer concept is based on the presentation "Monitoring the Control and Timing of VIs" by Dana Redington at NIWeek95. There are two parts to the Virtual Logic Analyzer: Probes, and the GUI interface. Probes are meant to be as efficient as possible, but do not place them in a MHz type loop. Instead place them in strategic locations where you can monitor program flow. Each VLA Probe is a reentrant vi that monitors your program's execution by timestamping data during program execution. Simply place this vi on your block diagram and connect the required Tag and Data inputs. Remember that dataflow governs LabVIEW execution. Be sure to give each Probe a unique Tag. Probes can be on a local or remote machine. Because Probes are OFF by default they can be left in an application and individually switched on or off later with the GUI application. To view and interact with the probes run the Virtual Logic Analyzer application. Instructions: This demo contains three asynchronous parallel loops. Two of the loops are enclosed in SubVIs. Inside each loop is a Virtual Logic Analyzer (VLA) Probe to monitor execution. Each VLA Probe is a reentrant vi that monitors your program's execution by timestamping data during program execution. Simply place this vi on your block diagram and connect the required Tag and Data inputs. Be sure to give each Probe a unique Tag. Probes can be on a local or remote machine. Because Probes are OFF by default they can be left in an application and individually switched on or off later with the GUI application. To view and interact with the probes run the Virtual Logic Analyzer application. The first time each Probe is called a unique reference is created by the VLA Create Probe.vi and an entry is made in the VLA Probe Registry.vi. Each probe entry contains information about the probe, its caller(s), and a queue reference for probe data storage. Probe data is stored in a queue for speed and memory efficiency. Although a probe will automatically create a reference the first time it is run, NO data is stored until the probe is turned on from the VLA application. This allows probes to be placed throughout an application and turned on and offf at will. Data collected by each Probe includes the call chain, priority, and execution system of the calling VI. Use this information along with the execution timing information to optimize execution on multi-threaded, multi-processor applications. This VLA Probe uses the OOP model Stepan Riha of NI introduced at NIWeek 97 and the Virtual Logic Analyzer concept is based on the presentation "Monitoring the Control and Timing of VIs" by Dana Redington at NIWeek95. Change Log: 0.9.0 First public release 0.9.1 GUI enhancements
  2. File Name: Virtual Logic Analyzer File Submitter: LAVA 1.0 Content File Submitted: 02 Jul 2009 File Category: LabVIEW IDE LabVIEW Version: 8.0 File Version: 0.9.1 License Type: Creative Commons Attribution 3.0 Potentially make this file available on the VI Package Network?: Undecided Virtual Logic Analyzer Copyright © 2007, Richard Jennings All rights reserved. Richard Jennings Author: Richard Jennings --see readme file for contact information Description: The Virtual Logic Analyzer is a development tool for monitoring VI execution. It is especially useful for optimizing the performance of multi-threaded, parallel applications. Monitoring Data and Timing information over an entire application can provide unexpected insight into performance bottlenecks. The VLA Probes use the OOP model Stepan Riha of NI introduced at NIWeek 97 and the Virtual Logic Analyzer concept is based on the presentation "Monitoring the Control and Timing of VIs" by Dana Redington at NIWeek95. There are two parts to the Virtual Logic Analyzer: Probes, and the GUI interface. Probes are meant to be as efficient as possible, but do not place them in a MHz type loop. Instead place them in strategic locations where you can monitor program flow. Each VLA Probe is a reentrant vi that monitors your program's execution by timestamping data during program execution. Simply place this vi on your block diagram and connect the required Tag and Data inputs. Remember that dataflow governs LabVIEW execution. Be sure to give each Probe a unique Tag. Probes can be on a local or remote machine. Because Probes are OFF by default they can be left in an application and individually switched on or off later with the GUI application. To view and interact with the probes run the Virtual Logic Analyzer application. Instructions: This demo contains three asynchronous parallel loops. Two of the loops are enclosed in SubVIs. Inside each loop is a Virtual Logic Analyzer (VLA) Probe to monitor execution. Each VLA Probe is a reentrant vi that monitors your program's execution by timestamping data during program execution. Simply place this vi on your block diagram and connect the required Tag and Data inputs. Be sure to give each Probe a unique Tag. Probes can be on a local or remote machine. Because Probes are OFF by default they can be left in an application and individually switched on or off later with the GUI application. To view and interact with the probes run the Virtual Logic Analyzer application. The first time each Probe is called a unique reference is created by the VLA Create Probe.vi and an entry is made in the VLA Probe Registry.vi. Each probe entry contains information about the probe, its caller(s), and a queue reference for probe data storage. Probe data is stored in a queue for speed and memory efficiency. Although a probe will automatically create a reference the first time it is run, NO data is stored until the probe is turned on from the VLA application. This allows probes to be placed throughout an application and turned on and offf at will. Data collected by each Probe includes the call chain, priority, and execution system of the calling VI. Use this information along with the execution timing information to optimize execution on multi-threaded, multi-processor applications. This VLA Probe uses the OOP model Stepan Riha of NI introduced at NIWeek 97 and the Virtual Logic Analyzer concept is based on the presentation "Monitoring the Control and Timing of VIs" by Dana Redington at NIWeek95. Change Log: 0.9.0 First public release 0.9.1 GUI enhancements Click here to download this file
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