Thank you very much!
I did send single point from RT side to FPGA.
Before I try using DMA FIFO, I tried two test methods.
First I bundled 8 point as cluster and sent it to FPGA. Then unbundled it in FPGA. But the phase shift still existed.
Then I transferred the case structure into FPGA, phase shift still couldn't be fixed. In fact, I test these 4 signal and found that all the values of them were different! I'm going crazy!