I am sending over data points periodically to the FPGA using the Read/Write Control. Considering that latency and throughput both matter for my application, should I use this function or should I switch to DMA FIFO. The smallest wait time I am establishing on the RT between each data point is 500 microseconds.
Should I be concerned about using this function considering that my loop iteration time is 500 microseconds when I am using a 1MHz timed loop clock.
For data acquisition, would you recommend that I use DMA FIFO considering latency doesn't really matter?
I appreciate all your help!
