durnek60 Posted April 27, 2011 Report Share Posted April 27, 2011 (edited) Hi! I've attached a vi, and an Image. I would like to send this image from RT to FPGA with DMA FIFO. In order to reduce the transfer time, I've joined U8 values to U64. After rebuilding my Image, I've seen, there is an unexpected shift on the reconstructed Image. Could you give me some explanation about this? Test.zip Edited April 27, 2011 by durnek60 Quote Link to comment
SuperS_5 Posted April 28, 2011 Report Share Posted April 28, 2011 (edited) Hi, The logic on the first for loop looks a bit strange to me. Changing it slightly solves your problem. I found 2 more solutions: These being closer to your original code. Edited April 28, 2011 by SuperS_5 1 Quote Link to comment
durnek60 Posted April 28, 2011 Author Report Share Posted April 28, 2011 Hi, The logic on the first for loop looks a bit strange to me. Changing it slightly solves your problem. I found 2 more solutions: These being closer to your original code. Thank you very very much! Quote Link to comment
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