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Resetting Single Board RIO via I/Os


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Hi,

I am wondering if there is a way of  resetting a single board RIO using one the available I/Os?  (I suspect not). The context would be a remotely located RIO board (that is:  not accessible), that is programmed via a network link from another location. At times, a reset could be required, this is where having a separate system applying a short to a dedicated I/Os could be helpful. thx

L.

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1 hour ago, ldbm said:

Hi,

I am wondering if there is a way of  resetting a single board RIO using one the available I/Os?  (I suspect not). The context would be a remotely located RIO board (that is:  not accessible), that is programmed via a network link from another location. At times, a reset could be required, this is where having a separate system applying a short to a dedicated I/Os could be helpful. thx

L.

There is a standard digital signal available in the FPGA environment that allows resetting the device. You can assert this pin from your FPGA program. So one way would be to add to your FPGA program a small loop that polls the external digital signal (preferably with some filtering to avoid spurious resets) and then feed that signal to the FPGA Reset boolean signal.

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