snowman13 Posted January 6, 2007 Report Share Posted January 6, 2007 Ok, so I am having major issues. I have spent several hours attempting this, seemingly simple problem... This is what I am trying to do: I am trying to create a program that receives a square wave synch input at 40khz. From here, I am trying to detect the beginnning of the positive flat portion of the square wave. From here, I need a for loop that recognizes the beginning of the positive flat portion, then outputs a short pulse at this point. However, there is a trick.... I need the first output pulse to be right at the beginning, then the second output pulse to be output at about 1/4 of the way through the positive portion of the square wave, then the third to be about 1/2 way through... and so on and so on. Any help would be great. I know there is something that I missing big time. Because I really should be able to do this in about 10 minutes. Quote Link to comment
crelf Posted January 6, 2007 Report Share Posted January 6, 2007 Please upload the code you've already tried so we have something to comment on. Quote Link to comment
snowman13 Posted January 6, 2007 Author Report Share Posted January 6, 2007 Please upload the code you've already tried so we have something to comment on. the only code I have thus far, is the signal generator and the signal analysis. The rest is kaput so I deleted it to attempt a different way. Is what I was doing, was send this signal through a peak detector and send it to my loop. This is where I am having the most trouble I can't seem to output the short pulse. And I also am having troubles jumping through the segments of each square wave. Quote Link to comment
crelf Posted January 6, 2007 Report Share Posted January 6, 2007 I'd still like to see the code - and also a data file with your signal in it, if that's at all possible. Quote Link to comment
snowman13 Posted January 6, 2007 Author Report Share Posted January 6, 2007 I'd still like to see the code - and also a data file with your signal in it, if that's at all possible. Alright, here is a really rough sketch of what I am trying to accomplish... I have that INPUT sync, and I am trying to create that output signal. I will post my code in the morning. Its on a different computer. Thanks so much! Quote Link to comment
Michael Aivaliotis Posted January 7, 2007 Report Share Posted January 7, 2007 What kind of hardware are you using to do this? Quote Link to comment
snowman13 Posted January 7, 2007 Author Report Share Posted January 7, 2007 What kind of hardware are you using to do this? I am using a PCI slot DAQ and just then standard TI switch board interface card to talk to the DAQ for the inputs and outputs. Quote Link to comment
Grampa_of_Oliva_n_Eden Posted January 7, 2007 Report Share Posted January 7, 2007 I am using a PCI slot DAQ and just then standard TI switch board interface card to talk to the DAQ for the inputs and outputs. Hi Snowman, It looks you are playing on both forums. Was your dilemma deciding which forum to post to? Your diagram now gives us some ideas but now it is time for details. What is teh freq of the sync signal? How fast are you sampling the sync? According to one of your posting you mentioned 40Khz. Is that the sample rate or sync pulse rate? After the timing seq you showed, does you output continues to skew relative to the sync? From what little I know about your app, I am thinking that this would be simple using cRIO Challenging in LV RT Possible under Windows if this can be implemented in hardware. Here is a link to the NI Exchange discusion http://forums.ni.com/ni/board/message?boar...=222937#M222937 Ben Quote Link to comment
snowman13 Posted January 7, 2007 Author Report Share Posted January 7, 2007 Ha, ya I am trying to get as many ideas as I can. The sync is at 40 khz. I believe I am sampling at 1M. And yes, the output does continue to skew relative to the sync. Quote Link to comment
Grampa_of_Oliva_n_Eden Posted January 7, 2007 Report Share Posted January 7, 2007 Ha, ya I am trying to get as many ideas as I can. The sync is at 40 khz. I believe I am sampling at 1M. And yes, the output does continue to skew relative to the sync. Ok here's a link to an example (ahem) from the NI web-site that shows a Phase Locked Loop (PLL). http://zone.ni.com/devzone/cda/epd/p/id/5153 I have hacked the example (ahem) to see if this is what you are after. Ben Quote Link to comment
snowman13 Posted January 7, 2007 Author Report Share Posted January 7, 2007 YOU ARE AWESOME!!! Thank you so much. That looks exactly like what I need! I guess I could have found that, had I done a little more research. Quote Link to comment
snowman13 Posted January 7, 2007 Author Report Share Posted January 7, 2007 Do you know if this will work ok at 40khz though? Quote Link to comment
snowman13 Posted January 7, 2007 Author Report Share Posted January 7, 2007 Is there a way to download that program in LV 8.0? That is what I am using and it gives me an error everytime I try to download it?? Quote Link to comment
snowman13 Posted January 8, 2007 Author Report Share Posted January 8, 2007 Hey, disregard my last two posts. I was able to find some answers from that other forum. That one seems to be a lot more active. I appreciate all your help. Quote Link to comment
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