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Posts posted by Jordan Kuehn
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The point I was trying to get across (unsuccessfully it seems!) is that even with a timeout a lot of CPU is used up waiting for the DMA buffer to have enough elements. This is probably contrary to what most people would expect.
I understood, but yes some might not. The point I was trying to get across is that in that situation a timeout is better than nothing, i.e. waiting/polling the entire time for the number of elements to become available. Either way, the picture is the better approach and allows the loop to do other things.
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Just to add to Jordan's post for those that don't know.
His picture shows an efficient way of reading from the DMA FIFO, first check to see if there are enough elements by requesting zero with a zero timeout, this will return the number elements remaining. Then only perform the actual read if the number of available elements is equal to (or more than) what you want.
My understanding of this necessity is that although the transfer occurs via DMA, if there are not enough elements yet then the CPU actually polls (using a lot of resource) until the number of elements is achieved, and this can really kill performance.
A picture says a thousand words , but yes I included both parts to demonstrate a good way to check if the elements exist before attempting to read them. Regarding your last point, I would suggest at least employing a timeout if someone isn't going to do the initial check. The host loop should be structured in such that it doesn't need data every iteration (if you are looking for a chunk of buffered data), or manually provide your own polling by placing something like what I have in the picture in a loop with a timing element.
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Also, you can only ever read one element at a time from the DMA FIFO on the FPGA, so you'll need a loop that iterates 2000 times to read all 2000 elements.
You can read multiple elements from a DMA FIFO.
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Someone is.
Yeah, I can't take credit for it, but it did take some thinking to google how to google recursively.
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Will they let you modify the drum? I've had some customers employ black spray paint in some places to help things out and were able to add it to their maintenance schedule.
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Logmein Central +Free (regular free is now defunct) is a fairly cost effective solution compared to TeamViewer.
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I know the student version has been around, but this is LV being distributed to the hobbyist market regardless of the version. I do agree that a home/personal version would be very nice and help expand the scope of the language.
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I usually use "Plot Area" >> "Size" rather then "Plot bounds" to resize graphs, but I have no idea if this will fix your issue.
Same here.
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I have run into this on a few systems and have to manually handle decimating the data sets that are displayed on a long term data logger. It's fairly frustrating, but works.
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I can't help but strongly suggest LIFA (LabVIEW Interface for Arduino)
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I got an automatic email with a new PDF certificate with the new date on it.
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The Ptp Sequencer's been really useful as a beginner in LabVIEW
Free for 30 days - no deplyment issues either which Ive found with other sequencers
I think your link is borked.
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Thanks Rolf! Good tips!
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Well to make a long story short it didn't happen.
Some winter weather hit Oklahoma in the week in question and they needed me to drive to Dallas to take the exam since we don't have a rep in OK currently. At this point, since there is no hope of me rescheduling in time for the summit, I plan to take it in a couple months when we have an OK rep and I don't waste 8 hours on the road. I'm a little bummed because I was finally ready to take it, but I'll just hope to have it by NI Week and will watch the videos from the summit if they get uploaded again this year.
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The guy at NI I spoke with today said it's possible, but it sounds like I'll be taking it within a weeks time. I've been casually preparing, but now it's time to actually get ready for it.
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Hey guys. I've finally gotten motivation (and funding) to go get a CLA. Any help or suggestions you have for preparing would be greatly appreciated. I'm hoping to make it to the March summit. I have read older posts, but I've also heard some news about changes to the test, so I decided to make a new post to hopefully capture more recent info. Thanks for all the help you can provide and I'll hopefully see you guys in a few short weeks! (if not, I'll blame the higher-ups for not approving the trip instead of me crashing and burning on this test)
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I got to watch it afterwards, so not live for me. I really enjoyed it and will definitely watch the episodes to come! Thanks guys!
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I fear he is trying to detect "Planes" by providing an image of a plane then seeing if the program can detect a plane in another picture.
Ah. Yeah... I guess that's why we have jobs at least?
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I would suggest working with the vision assistant to get started. You can convert the express VI into a regular VI later by right clicking and opening the front panel. This should get you a good starting point.
Off the bat I'd point out that you don't want to dispose of your references until after processing. What pattern are you trying to match?
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A simple queued state machine will work just fine on the CLD. Get it (mostly) functional, document well, and keep everything neat.
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There's this KnowledgeBase entry about setting up your computer as a time server over on the dark side...
http://digital.ni.com/public.nsf/allkb/EA90C9FF24D9A041862575EE004ED415
Interesting. I'll check it out. This should be much much simpler though.
Reading fixed size of elements using FPGA FIFO
in Application Design & Architecture
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