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Found 1 result

  1. I'm at a loss for what could be happening so I'm hoping somebody else has done something similar. I am using LabVIEW 2015 SP1 with the FlexRIO 15.5 drivers with the 7935R and receive an internal software error when trying to compile the example project "NI793xR - MGT Aurora CLIP.lvproj" when generating intermediate files. The Error I'm getting is copied below. Error -250514 occurred at Possible reason(s): An AXI4-Lite address map element cannot fit in the specified address collection. Make sure that each address map elements' offset plus size does not exceed the address collection's total size. My goal is to replace the DRAM FIFO that is currently being used to write to Port 0 with a Count Up, Count Down, or PRBS signal. I was receiving the same compilation error after trying to make these changes. I tried to be very careful with what I replaced and was pretty confident that I hadn't touched any of the AXI4 functions. I tried compiling the example project because I was going to start over and make sure I had a good starting point. The example does run but that's using the bitfile that's already compiled. I've tried compiling using the cloud as well as a company compile server. I'm also installing software so I can try this on another computer. I don't think I need the tools locally for this but I might try installing those to double check. Pretty much out of ideas and wasn't able to find much online so any help would be appreciated. Matt J Edit: Same compilation error on second computer with local tools, both Windows 7.
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