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Showing results for tags 'error cluster'.
CAR# 378165 LabVIEW Version 11.0.1f2 In a VI for a FPGA target, if an error cluster is wired to one input of an OR gate that has a Boolean wired to the other input, then in the "generate intermediate files" process that precedes the Xilinx bitfile generation, "stage 1 of 7" (analyzing VI hierarchy) will very repeatably crash while processing the VI. See attached PDF.
Hi. I have this 'Error & Warning' toolset with a functions and a controls palette: The controls palette contains only a single control, basically a subVI dropping its contents on the front panel when dragged there. That contents is two error clusters so I don't have to visit the control palette twice to get those (there are a small number of additional changes to these controls, mainly label and caption formatting to match GPower style). When dragged and dropped I have this on the FP: When dropping these it'd be nice if some additional stuff happened, like they automatically got