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Showing results for tags 'design pattern'.
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I'm excited to release ViPER ViPER is an Object Oriented design Framework that supports dependency injection and recursive object creation. Systems are assembled at runtime from a collection of pre-built components defined by an Object Definition Document. Please visit the project on GitHub https://github.com/kurtafriday/ViPER I've presented this framework at several GLA Conferences, for an overview and guidance please view. GLA 2021 https://labviewwiki.org/wiki/GLA_Summit_2021/Open_Source_ViPER GLA 2020 https://labviewwiki.org/wiki/GLA_Summit_2020/ViPER_-_A_LabVIEW_Dependency_Injection_Framework This branch of ViPER has been used by us to develop systems in regulated industries for several years, it's solid and reliable, however its windows only. I'm working on ViPER_WinRT which is compatible with Windows and RT and we have already used it for several systems. I'll be releasing ViPER_WinRT in the coming months. I'll work to get ViPER onto the VIPM Tools Network soon. I'm looking forward to the feedback and I hope you enjoy and get value from this framework. Ping me if you have any questions. kurt@medulla.net
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Hi, I am quite familiar with different design pattern on LabVIEW but I am a newbie on FPGA design. I start working on a project for my own hobby using myRIO to control motor speed with PWM and read back encoder. This is the first part of my project and I plan to expand more later. This project will help me to get use to FPGA too. I am trying to learn a good design pattern by follow the template project which is "LabVIEW FPGA control on Compact RIO". In this template project, feedback value and control signal are analog channels and they connect directly with PID module in FPGA in a normal while loop. The configuration are sent from host. In my prototype project, I already built FPGA module to drive PWM and read encoder using single-cycle time loop. I plan to use PID in real time code. If I want to follow the template design, I have to change the way I implement the code for FPGA and Real-Time. So right now, I am not sure what is a good design I should follow. If you have any advice, I will highly appreciate. Thank you very much!