Jump to content

Search the Community

Showing results for tags 'design pattern'.



More search options

  • Search By Tags

    Type tags separated by commas.
  • Search By Author

Content Type


Forums

  • Software & Hardware Discussions
    • LabVIEW General
    • LabVIEW (By Category)
    • Hardware
  • Resources
    • LabVIEW Getting Started
    • OpenG
    • Code Repository (Certified)
    • LAVA Code on LabVIEW Tools Network
    • Code In-Development
  • Community
    • LAVA Lounge
    • LabVIEW Feedback for NI
    • LabVIEW Ecosystem
  • LAVA Site Related
    • Site Feedback & Support
    • Wiki Help

Categories

  • *Uncertified*
  • LabVIEW Tools Network Certified
  • LabVIEW API
    • VI Scripting
    • JKI Right-Click Framework Plugins
    • Quick Drop Plugins
    • XNodes
  • General
  • User Interface
    • X-Controls
  • LabVIEW IDE
    • Custom Probes
  • LabVIEW OOP
  • Database & File IO
  • Machine Vision & Imaging
  • Remote Control, Monitoring and the Internet
  • Hardware

Find results in...

Find results that contain...


Date Created

  • Start

    End


Last Updated

  • Start

    End


Filter by number of...

Joined

  • Start

    End


Group


Personal Website


Company Website


Twitter Name


LinkedIn Profile


Facebook Page


Location


Interests

Found 1 result

  1. Hi, I am quite familiar with different design pattern on LabVIEW but I am a newbie on FPGA design. I start working on a project for my own hobby using myRIO to control motor speed with PWM and read back encoder. This is the first part of my project and I plan to expand more later. This project will help me to get use to FPGA too. I am trying to learn a good design pattern by follow the template project which is "LabVIEW FPGA control on Compact RIO". In this template project, feedback value and control signal are analog channels and they connect directly with PID module in FPGA in a normal while loop. The configuration are sent from host. In my prototype project, I already built FPGA module to drive PWM and read encoder using single-cycle time loop. I plan to use PID in real time code. If I want to follow the template design, I have to change the way I implement the code for FPGA and Real-Time. So right now, I am not sure what is a good design I should follow. If you have any advice, I will highly appreciate. Thank you very much!
×
×
  • Create New...

Important Information

By using this site, you agree to our Terms of Use.