FPGA Read/Write Control vs. DMA FIFO

[Aaqil Shariff]

I am sending over  data points periodically to the FPGA using the Read/Write Control. Considering that latency and throughput both matter for my application, should I use this function or should I switch to DMA FIFO. The smallest wait time I am establishing on the RT between each data point is 500 microseconds.

Should I be concerned about using this function considering that my loop iteration time is 500 microseconds when I am using a 1MHz timed loop clock.

For data acquisition, would you recommend that I use DMA FIFO considering latency doesn't really matter?

I appreciate all your help!

Edited August 6, 2023 by Aaqil Shariff

[hooovahh]

Well the real answer is probably going to depend on what works for you.  The setup you have now is obviously easier than re-writing it to use a DMA FIFO.  But if you are worried about precision of the waveform you can put a scope on it and look at some transitions to see how different the waveform is from the expected output.

Years ago I did develop some code that allows for a table of times and voltages to be sent to the FPGA, and then in my case it would linear interpolate between the points, sending out the data timed by the FPGA.  The code could be improved a lot, but it might give you an idea of what is possible, and how to do some timing of a table output.  My situation was with a non repeating waveform that could be many hours long.  I initially tried doing this with DAQmx hardware, adding to a finite buffer as time went on.  But this became difficult to manage, and there were memory issues.  My wave also was discrete points, and not a sine wave.