Ack , need help with cRIO 9035 ASAP

[Dan Bookwalter N8DCJ]

Ok , I have a project I need to work on , with out a ton of time , 1.5 months , it uses cRIO (9035 Chassis) , I just need a quick primer on AI,AO and DO... I am reading as much as I can .... but , any examples would be greatly appreciated ...

Ni-Max and LV see the 9035 , I have RT and FPGA licenses , Ni-Max says I have all the s/w , but , I cant find how to do a test in Ni-Max like the examples I see on NI.com

I am connected via USB , ultimately it needs to be connected via Ethernet ....

I know I am asking a lot at the moment , but , anything that can get me going would be fantastic.... 

Regards

Dan

[Dan Bookwalter N8DCJ]

OK , making a little progress I suppose , I tried to connect to it after right clicking on things , said wrong version of LabVIEW , so I am installing 2019 to see if I get any further...

 

DAn

[JKSH]

2 hours ago, Dan Bookwalter N8DCJ said:

I cant find how to do a test in Ni-Max like the examples I see on NI.com

NI MAX is for testing DAQmx hardware (like CompactDAQ, for example). DAQmx support was added to CompactRIO-904x and 905x, but cRIO-903x is not supported.

You only have Scan Engine and FPGA, so you cannot test your hardware with NI MAX.

 

2 hours ago, Dan Bookwalter N8DCJ said:

any examples would be greatly appreciated

Use the NI Example Finder: https://knowledge.ni.com/KnowledgeArticleDetails?id=kA03q000000YIKbCAO&l=en-US

Good luck!

[Dan Bookwalter N8DCJ]

JKSH

 

Thanks for the info !!

next question , does bitness between LV and the cRIO have to match , my assumption is that it does ....

I also see i need to download the XiLinx drivers etc... I am installing LV 2021 64 bit since the 9035 has 64 bit on it... and will download the Xilinx drivers after this is done installing.

 

Dan

[JKSH]

3 hours ago, Dan Bookwalter N8DCJ said:

does bitness between LV and the cRIO have to match

No, it doesn't. You can use 32-bit LabVIEW to develop software for your 64-bit cRIO.

In fact, 32-bit LabVIEW supports more drivers/toolkits for cRIO than 64-bit LabVIEW.

 

3 hours ago, Dan Bookwalter N8DCJ said:

I also see i need to download the XiLinx drivers

Only if you want to write FPGA code.

Do you strictly need to write custom code for the FPGA? If not, then I suggest you skip this. FPGA programming is subtly different and more complex than regular RT programming. If you're new to cRIOs and you only have 1.5 months, then you could end up taking a huge percentage of that time trying to figure out how to use the FPGA.

So my question is: What is the maximum sample rate that your AI, AO, and DO need?

[Dan Bookwalter N8DCJ]

Ok on the bitness , I Will stick with 32 bit ...

 

The reason I mentioned the FPGA is because when LabVIEW finds the 9035 , it says one of the modules can only be used in FPGA Mode.

 

Scan rate , I think 100Hz is more than fast enough , which I think is well within the capabilities of RT if I recall properly.

 

 

[Rolf Kalbermatter]

4 hours ago, Dan Bookwalter N8DCJ said:

Ok on the bitness , I Will stick with 32 bit ...

The reason I mentioned the FPGA is because when LabVIEW finds the 9035 , it says one of the modules can only be used in FPGA Mode.

Scan rate , I think 100Hz is more than fast enough , which I think is well within the capabilities of RT if I recall properly.

You can use the Scan Engine which by default has a scan interval of 10 ms if I"m not mistaken. It can go down to 1 ms but that should not be used unless you are knowing exactly what you are doing. However some of the C modules do not have Scan Engine support so you need to check that.

[Dan Bookwalter N8DCJ]

ok , after messing with this for an hour , I now have all the s/w versions compatible with each other between the PC and the cRIO 9035...

I was told the plan was to run this in scan mode , but , the one module is an NI 9202 filtered AI module , LV says it is FPGA only ...

 

Next question (for now) is , can a chassis mix RT and FPGA ?

 

Dan

[JKSH]

3 hours ago, Dan Bookwalter N8DCJ said:

can a chassis mix RT and FPGA ?

Yes, it's called Hybrid Mode: https://knowledge.ni.com/KnowledgeArticleDetails?id=kA03q000000YIDfCAO&l=en-US

 

3 hours ago, Dan Bookwalter N8DCJ said:

I was told the plan was to run this in scan mode , but , the one module is an NI 9202 filtered AI module , LV says it is FPGA only ...

That's a shame. 100Hz is definitely possible with the Scan Engine (on supported hardware).

[Dan Bookwalter N8DCJ]

ok , I have had little to no time to devote to this , but , my guess (and is purely a guess) anything under the FPGA/RT sections of the LabVIEW project get compiled and loaded on the cRIO ? 

And , when I see examples , mainly just images on the internet for now , I see an Open FPGA VI Reference , once again my assumption is that is a reference to the VI that is on the cRIO , I also assume , since I can rationalize both scenarios , that the vi's referred o as "Main" are loaded to the cRIO , and the "Host" ones run on the PC , I am going from memory so , that will be a bit fuzzy...

In the long run , I will be dealing with 7 modules in the chassis , 5 various AI modules (Voltage , mA, TC) and two output modules (SSR and AO). Nothing is highspeed , I just need to start working on this more than I have been able to , and to try and get up to speed a little ...

Most of what I have seen is using User-Defined Variables , is that the standard/accepted approach ? 

 

Dan

[JKSH]

3 hours ago, Dan Bookwalter N8DCJ said:

my guess (and is purely a guess) anything under the FPGA/RT sections of the LabVIEW project get compiled and loaded on the cRIO ? 

Yes. The RT code gets compiled into an .rtexe file which is loaded by the LabVIEW runtime engine, while the FPGA code gets compiled into a bitfile which is loaded into the FPGA.
 

3 hours ago, Dan Bookwalter N8DCJ said:

Most of what I have seen is using User-Defined Variables , is that the standard/accepted approach ? 

You can use User-Defined Variables, or you can use Controls/Indicators on your top-level FPGA VI: https://www.ni.com/docs/en-US/bundle/labview-fpga-module/page/lvfpgaconcepts/pfi_data_transfer.html

For your slow use-case, it probably doesn't matter which one you pick.

 

3 hours ago, Dan Bookwalter N8DCJ said:

In the long run , I will be dealing with 7 modules in the chassis , 5 various AI modules (Voltage , mA, TC) and two output modules (SSR and AO). Nothing is highspeed , I just need to start working on this more than I have been able to , and to try and get up to speed a little ...

I suggest you get something going for the Scan Engine first. Add your FPGA after.

 

3 hours ago, Dan Bookwalter N8DCJ said:

And , when I see examples , mainly just images on the internet for now , I see an Open FPGA VI Reference , once again my assumption is that is a reference to the VI that is on the cRIO , I also assume , since I can rationalize both scenarios , that the vi's referred o as "Main" are loaded to the cRIO , and the "Host" ones run on the PC , I am going from memory so , that will be a bit fuzzy...

Not sure what your question is here, sorry. Just search for "9202" in the NI Example Finder and run an example on your cRIO.

[Dan Bookwalter N8DCJ]

Ok , I had higher priorities than this project , but , now I an back on it...

So , i have established communication with an AI module and can read a voltage. My question is , do I have to use sharded variables ? one of the examples i saw online was using shared variables to communicate between the cRIO and the HMI vi.

My plan was have the cRIO take the data only and pass it to the HMI type vi to do processing and displaying , set AO and DIO.

I was going to use a seperate while loop for each "function" , such as AI , AO , DI ,DO as I saw thatit is more efficient that way.

I am goign to start lookign into this type of architecture and see where I go wrong.

 

Dan

[Jordan Kuehn]

Is your HMI a PC running LabVIEW or is it something else? If the former, you can certainly use Network Shared Variables and get quite a lot accomplished. Especially if you just intend to expose the data to the host code and let it handle the logic and controls directly. You can also look at network streams if you want lossless communication, and/or to pass command/responses. 

If not LabVIEW then you'll need to look at the protocols it supports and make a determination regarding where you want the logic parts to live. I typically find myself wanting to put as much in the cRIO as possible and keep the UI pretty thin/lightweight, especially if I want to have multiple UIs for the same device.

[Dan Bookwalter N8DCJ]

Jordan

 

Thanks for the info ... 

The HMI is LabVIEW , and yes my plan is to just expose the the data to the HMI and let the processing take place there , as I can forsee limits and scaling changing often , I currently load all of that via an excel spreadsheet to a SQLite DB.

I will look into shared variables and the streams.

 

Dan

[Dan Bookwalter N8DCJ]

quick question

Are the fpga and realtime bundled with any NI products , i have a copy of all the serial numbers from our one facility , but , there doesnt seem to be any specific to fpga/realtime , but , they do use them. So , i was curious if it is included in somethign else ?

Dan

[Rolf Kalbermatter]

14 minutes ago, Dan Bookwalter N8DCJ said:

quick question

Are the fpga and realtime bundled with any NI products , i have a copy of all the serial numbers from our one facility , but , there doesnt seem to be any specific to fpga/realtime , but , they do use them. So , i was curious if it is included in somethign else ?

Dan

It depends on the license. If you purchase a normal single seat license these things are usually separate products that also come with their own serial number. If you have a Software Developer Suite license such as what Alliance Members can purchase, but there are other Developer Suite licenses too, then one single license number can be for pretty much all of NI Software or at least a substantial subset of them. So you really need to know what sort of license the serial number belongs to.

[Dan Bookwalter N8DCJ]

Rolf

Thank you for the quick response , they do have an NI Developer suite license , maybe I will investige that , guess I will need to calll NI.

Dan

[Jordan Kuehn]

2 hours ago, Dan Bookwalter N8DCJ said:

quick question

Are the fpga and realtime bundled with any NI products , i have a copy of all the serial numbers from our one facility , but , there doesnt seem to be any specific to fpga/realtime , but , they do use them. So , i was curious if it is included in somethign else ?

Dan

https://www.ni.com/en-us/shop/software/products/embedded-control-and-monitoring-software-suite.html

[Dan Bookwalter N8DCJ]

Ok , after reading some of the cRIO dev guide , the Current Value Table looked like it might be somethign I could use , i downloaded everything vi JKI PM , everythign installed fine. But it doesnt show up anywhere. is this a RT only componenet ? I only have the FPGA Module license , they didnt buy a RT Module. I need to start hitting this hard so , any advise is appreciated.

 

Dan

[JKSH]

4 hours ago, Dan Bookwalter N8DCJ said:

I only have the FPGA Module license , they didnt buy a RT Module.

...then you won't be able to develop software for the cRIO 9035 😞

 

4 hours ago, Dan Bookwalter N8DCJ said:

I need to start hitting this hard so , any advise is appreciated.

Start talking to your supervisor and checking your LabVIEW modules. You can't do your project without the Real-Time Module.

You did say before they had "an NI Developer suite license"? The Real-Time module should be part of the Developer Suite.

 

4 hours ago, Dan Bookwalter N8DCJ said:

the Current Value Table looked like it might be somethign I could use , i downloaded everything vi JKI PM , everythign installed fine. But it doesnt show up anywhere. is this a RT only componenet ?

No, it's not RT-only. In your Block Diagram pallette, look for Data Communication > Current Value Table.

You should also find the files in C:\Program Files (x86)\National Instruments\LabVIEW 20xx\vi.lib\NI\Current Value Table<vi.lib\NI\Current Value Table

[Dan Bookwalter N8DCJ]

Ok after spending 2 hours today with NI support , it appears we will have to buy a RT license as we do not have one... if we do it is from an NI Developer Suite from 2014 or 15 I think , and I doubt that will work with our LV 2021 and FPGA 2021.

I hope someone can answer this question for me , we bought a perpetual FPGA license , my assumtion , is that means the license will work on all future versions of FPGA , and , that we need (or highly advised) to get an RT perpetual license if such a thing exists.

NI did extend my RT evaluation by 2 weeks so I can at least work on it until work decides what they are going to do , although the solution seems simple to me. accounting may think differently.

Dan

[JKSH]

4 hours ago, Dan Bookwalter N8DCJ said:

we bought a perpetual FPGA license , my assumtion , is that means the license will work on all future versions of FPGA

No, each license is for a particular version of the LabVIEW FPGA module. So if you bought LabVIEW FPGA Module 2015, then you can't use it with LabVIEW 2016 or newer. "Perpetual" just means you can keep using that version forever.

 

4 hours ago, Dan Bookwalter N8DCJ said:

we need (or highly advised) to get an RT perpetual license if such a thing exists.

NI no longer officially sells perpetual licenses. They are now using the subscription model from this year onward:

 

See also https://forums.ni.com/t5/LabVIEW/LabVIEW-subscription-model-for-2022/td-p/4204448 (some people said how they still managed to get a copy of a perpetual license, but it took some arm-twisting)

[Dan Bookwalter N8DCJ]

Ok on all  , well I will let them battle it out with NI over licenses .... o in the mean time...

I have 60 inputs and 15 outputs I need to deal with ....

What is the best/easiest way to realize say a 10hz scan rate , which methodology would be recommended?

I threw some stuff together today just to see if I could get readings , I was able to , but , way too slow ... as I figured , I dropped a bunch of I/O nodes for a couple of the modules on the block diagram , connected some indicators and ran it. with only 25% of the channels I ultimately need to scan , I got maybe 1 Hz.

the one module requires FPGA , I figured I would try to do it all in FPGA mode , rather than Hybrid , not sure which approach I should...

Looking for guidance ...

Dan

p.s. I am going to start looking at what examples I can find now ....