How to separate decimals and integers on the FPGA side?

[王佳]

Please give me some advice and help, thanks guys!

[Neil Pate]

This question can be interpreted a bunch of ways. Can you explain with a bit more detail? Maybe show us some pictures?

 

[王佳]

On 4/19/2024 at 5:09 AM, Neil Pate said:

This question can be interpreted a bunch of ways. Can you explain with a bit more detail? Maybe show us some pictures?

 

Firstly thank you very much for your reply! My idea is simple, input a fixed point number and how to output its integer part separately from its decimal part. For example, if the input is 1.5, the output will be 1 and 0.5.🤪

[王佳]

On 4/19/2024 at 5:09 AM, Neil Pate said:

This question can be interpreted a bunch of ways. Can you explain with a bit more detail? Maybe show us some pictures?

 

I seem to have implemented this feature. Using the module round toward-infinity. That should do it, right?🤨

[infinitenothing]

No, that probably doesn't work how you expect for negative numbers. Fortunately, for fixed point numbers, the decimals are just the least significant bits. The cool thing about that approach is that the code is just a wiring operation and thus uses ~0 resources and 0 time to calculate.

 

[王佳]

7 hours ago, infinitenothing said:

No, that probably doesn't work how you expect for negative numbers. Fortunately, for fixed point numbers, the decimals are just the least significant bits. The cool thing about that approach is that the code is just a wiring operation and thus uses ~0 resources and 0 time to calculate.

 

If my requirement does not include the case of negative numbers, can I use the procedure I wrote above.

[infinitenothing]

Yes, I think that should work fine for positive numbers. It's probably less efficient than my method though.