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jcarmody

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Posts posted by jcarmody

  1. A post on NI's forum asked:

    QUOTE

    I want to put a formula node on the front panel of a LabVIEW execution file, so that user can type their own code in the formula node and get their own output. I tried this but it seems only feasible before I build the source code to an execution file.

    Is there anyone can help me? I appreciate your help.

    I posted a solution using the OpenG Python tools (a few solutions, actually, as I kept playing) but I wonder how I can improve what I finally came up with. I use a Case structure in a For loop to get the data from the Python session, but I've had to put a case for each data type. Is there a way to get this dynamically?

    Thanks,

    Jim

    post-7534-1239112284.jpg?width=400

    Download File:post-7534-1239112361.vi

  2. QUOTE (Pollux @ Apr 6 2009, 09:09 AM)

    For some reason after calling one of them, executing and exiting the vi, the main vi doesn't respond anymore to comands.

    I'm wondering if your SubVI is really closing. I see your While Loop termination in the 'Achizitie' case so execution should continue in your Main VI, but apparently it isn't. Take Mike's advice and use Execution Highlighting to see what happens after you close the second VI. Perhaps you have another event configured that is stopping the loop. What/how many cases have a True wired to the loop condition terminal?

    I was first struck with the Mouse Up event you're acting on; is there any reason you didn't use the Value Change event? That is typically used.

  3. QUOTE (alfa @ Mar 31 2009, 06:55 AM)

    I was thinking:

    What the capitalists and the communists do have in common?

    They are half-cannibals. They like to eat lambs!

    I'm beginning to think you've lumped us into that group.

    I resemble that implication! :angry:

  4. QUOTE (alfa @ Mar 20 2009, 04:03 AM)

    in my view the spacetime of our death is seald; the place and the time of our death is known long time before we die.

    Isaiah 46:10 "Declaring the end from the beginning, And from ancient times things that are not yet done, Saying, 'My counsel shall stand, And I will do all My pleasure"

    Seems like someone beat you to it.

  5. In my factory job I've found that my managers expect me to be equal to an Electrical Engineer (I'm not), in my previous job I was expected to know everything about LabVIEW, SCC & a bunch of the other stuff already mentioned.

    I'd add that you need to be able to research & learn new things on your own. Become proficient finding answers (including nuggets like prepending "site:forums.lavag.org" or "site:forums.ni.com" to a Google search).

    The last thing I have to offer is that you should make sure that you understand what tasks they're going to throw at you and that they are very clear of your limitations. Getting a new job is exciting, but it stinks to be jammed into something you're unable to perform.

  6. There's a new article on computerworld.com that contains this:

    QUOTE

    Designing parallel programs is becoming fundamental to the programmer's job and those who do not figure it out will have a limited career path

    They should get with the times. We've been doing this for a long time now. It's an interesting article, anyway.

    Jim

  7. I'm developing an ATE that needs to communicate with a UUT that contains a microprocessor with a HOLD line. I can manipulate the UUT as long as I keep that pin high; the microprocessor takes over as soon as I drop it. These UUTs haven't had their programs loaded by this time (that's part of my ATE's job) so a watchdog takes over and the UUT isn't addressable until I cycle its power. (There are a few other lines/states that I need to maintain in order to conduct my tests.)

    The problem I have is that I have to do a bunch tests and I use a few different FPGA programs to do them. I believe that the digital outputs are dropping when I push a new program to the target and I loose the control lines that allow me to work. I can regain control by resetting the outputs and cycling power every time I change FPGA programs, but I'd rather not (it just doesn't seem right.) My current solution is to take all of the individual programs and unpack them into one Uber-FPGA program (I'm compiling that now) but the block diagram is large and it hurts me when it doesn't fit on one screen.

    Is there a way to keep the digital output lines from dropping when I change programs?

    Thanks,

    Jim

  8. I have to interview several people over the next week to fill a position one level above me. This person will be responsible for developing ATEs but will also have management responsibility for satisfying all ATE/test requirements in the plant. The resumes I've read so far don't have any LabVIEW experts and I'm worried! I'm not an EE and only have a few years under my belt doing Test Engineering, so I don't know what specific questions to ask.

    I read the existing posts on interviewing to fill a LabVIEW developer position, but this isn't the same.

    What can you suggest?

    Thanks,

    Jim

  9. QUOTE (vieira @ Feb 16 2009, 07:21 AM)

    Yes, aleatory means random numbers between 1 to 10.

    I need a matrix nxn, n rows and n columns (for example: 3x3, 4x4,5x5, 6x6, 7x7,....). The "n" must be entered by control.

    Thank you.

    Ok, you've confirmed what I thought. Have you tried nesting two For Loops and building your array? Put your Random Number stuff inside the inner loop, wire the "n" control to the "N" terminals and wire the random number through both loops to a 2D array indicator on the outside (with indexing enabled in both loops, of course).

    Jim

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