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To generate and compile the Labview FPGA for other hardware with Xilinx FPGA, just create a XML file (*.xml) in <lvdir>\Targets\NI\FPGA\<hardware> and create a few files .ucf and .vhd in <lvdir>\Targets\NI\FPGA\<hardware>\FPGAFiles\ . example: LV2015DIR\Targets\NI\FPGA\MT-P160\MTresource.xml , LV2015DIR\Targets\NI\FPGA\MT-P160\FPGAFiles\ The rest is the additives used for data transfer and programming.

I have given you my advice. Try implementing it as a 2D string array first. Leave the tree out of it.. Once you have mastered that you can think about getting it working in the tree. As I said way earlier on in this thread I really think you are "mixing methaphors" here. The cluster viewer displays the "values" of items in the tree, not the set of all possible items. If you want that you are going to have to add it yourself and the tree API is not pleasant to work with.

You need to learn to crawl before you can walk... perhaps somebody in this forum will just show you the answer you are looking for (i.e. do your work for you). I am not that guy though, sorry.

Here is a .ctl file -- a borderless cluster. How did I build it? I hacked around in the debugger. But the resulting .ctl file passes all sanity checks and should be usable. The control file is saved in LV8.0. Borderless Cluster.ctl