Try to start a shared variable lib, to simulate code in a cRIO

[Neon_Light]

Hello hope you can help,

(did edit this text to make it better to understand)

 

Normal testcode 

(If I have more time I can try to include this code)

I try to simulate the real time main in a cRIO test project. All goes well I can run the real time main on "my computer" target and use the FPGA in simulation mode without the use of real hardware.

when I add an extra loop to the real time main with new shared variables which are not used in the simulated FPGA,  I can not deploy anymore. In that case I can only deploy  when I use the option disable auto deploy variables (right mouse on RT compact RIO target) and make the variables absolute (right mouse on the variable in the blockdiagram code). but when I run with this option I get an error  -1950679035 when I want to use the shared variables which are *not* used in the FPGA. I Use a desktop execution node to change data on the simulated FPGA this works fine. 

 

Smaller code without the FPGA 

I made the code smaller and easier to understand to have focus on the shared network variables,  this code is included below . There is a screenshot and the real code. 

When I use the small program and try to load the *non* FPGA shared variables,  I get the same error  -1950679035. 

when I only use the shared variables which are previous used in the FPGA vi  and remove the non FPGA shared variables all is okay, I can also see the FPGA variables in the  in the Ni Distributed system manager. Although the other program simulating the total cRIO code with FPGA has long been stopped.

What I want is to open a library with a link to the file e.g.:   C  : \folder with *.vlib     . But I am unable to open a direct link to the harddrive e.g.:  C:\Users\noob\Documents\labview projects\cRIO\My Control Application\Shared Variables\Noob Shared Lib.lvlib I get the error -1950679035 again. 

I only do not get errors when I try to acces network shared variables I did previous use in the test with the FPGA simulation and where where used in the FPGA code.  I think the desktop execution node only adds shared network variables from the FPGA code to the Ni variable server and does not do this for the shared network variables in the Real time main code. I am able to see the old FPGA shared network variables when I use the NI Distributed System Manager which can be found at the tools menu. 

I think I must  load a variable library into the server before I can acces it with the code below is this correct? Can anyone point me in the correct direction to do this?

hope you guys can help and I hope this text is easier to understand compared to the text I wrote last night 🙂 at nights it tends to be late and my texts show that. 

If the question is not clear please let me know then I will try to solve it. Hope you guys can help thanx!

 

 

 

 

 

 

 

 

 

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Edited November 4, 2023 by Neon_Light
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