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  1. Had a great success with Network Published Shared Variables from the get-go. Used them on a large project sharing data between multiple devices on the network - worked great. Until one day (yesterday), when they stopped. No change in the code, the same base was running for 4 years on multiple systems (NI-9042 cRIO + NI-9147 eRIO). Yesterday, loaded the code on a brand new cRIO and ooh-la-la - surprise. No more data sharing. Only on a new platform. Loaded the same code on the old one - everything works. Modified the code to make data sharing more transparent for troubleshooting. No, there is no data coming to the consumers. Not sure though whether it is writing to the shared variable or reading from it but the fact is no more data. At this point I am totally baffled to what could possibly happen. Checked the drivers - the Network Variable Engine 17.0 is installed. Although, I am not sure how to check if it is running. I tried to use Linux tools in CLI but didn't see any process name resembling the Network Variables Engine. I wonder if anybody had similar experience or can suggest where to look? Maybe I am overlooking some weird settings somewhere? Like blocked ports or network registration... However, I couldn't find anything, no matter how hard I looked. Any help would be greatly appreciated! Thanks.
  2. Hello hope you can help, (did edit this text to make it better to understand) Normal testcode (If I have more time I can try to include this code) I try to simulate the real time main in a cRIO test project. All goes well I can run the real time main on "my computer" target and use the FPGA in simulation mode without the use of real hardware. when I add an extra loop to the real time main with new shared variables which are not used in the simulated FPGA, I can not deploy anymore. In that case I can only deploy when I use the option disable auto deploy variables (right mouse on RT compact RIO target) and make the variables absolute (right mouse on the variable in the blockdiagram code). but when I run with this option I get an error -1950679035 when I want to use the shared variables which are *not* used in the FPGA. I Use a desktop execution node to change data on the simulated FPGA this works fine. Smaller code without the FPGA I made the code smaller and easier to understand to have focus on the shared network variables, this code is included below . There is a screenshot and the real code. When I use the small program and try to load the *non* FPGA shared variables, I get the same error -1950679035. when I only use the shared variables which are previous used in the FPGA vi and remove the non FPGA shared variables all is okay, I can also see the FPGA variables in the in the Ni Distributed system manager. Although the other program simulating the total cRIO code with FPGA has long been stopped. What I want is to open a library with a link to the file e.g.: C : \folder with *.vlib . But I am unable to open a direct link to the harddrive e.g.: C:\Users\noob\Documents\labview projects\cRIO\My Control Application\Shared Variables\Noob Shared Lib.lvlib I get the error -1950679035 again. I only do not get errors when I try to acces network shared variables I did previous use in the test with the FPGA simulation and where where used in the FPGA code. I think the desktop execution node only adds shared network variables from the FPGA code to the Ni variable server and does not do this for the shared network variables in the Real time main code. I am able to see the old FPGA shared network variables when I use the NI Distributed System Manager which can be found at the tools menu. I think I must load a variable library into the server before I can acces it with the code below is this correct? Can anyone point me in the correct direction to do this? hope you guys can help and I hope this text is easier to understand compared to the text I wrote last night 🙂 at nights it tends to be late and my texts show that. If the question is not clear please let me know then I will try to solve it. Hope you guys can help thanx! Enable Debug modus.vi
  3. Hello guys, I need to deploy a startup.rtexe into my cRIO-9049 (from LabVIEW Project Explorer or CLI, whatever), and I need to use the ./nilvrt start and ./nilvrt stop commands to start and stop the RT App respectively, at will. I noted that it is mandatory to reboot the cRIO after deploying the .rtexe to use the ./nilvrt start and ./nilvrt stop. However, I must avoid rebooting the cRIO (because of my customer requirements). I was trying to find a setting for this, but the only file I found related to the startup.rtexe is the /etc/natinst/share/lvrt.conf file with the token RTTarget.LaunchAppAtBoot. This key is set to True when the Run As Startup option is selected from the LabVIEW Project Explorer. I put this key in False to check if this allows me to run the RT App without rebooting the cRIO, but this did not help 😔. Is there another config file to be modified in order to support what I need to do? Is it completely necessary to reboot the cRIO to recognize the new .rtexe and use the ./nilvrt start and ./nilvrt stop commands? Thanks!
  4. With exciting projects in oil and gas, aerospace, utilities, and other industries, Vertical AIT is looking to hire skilled LabVIEW developers and architects in the Houston area. We are an Alliance Partner, and we specialize in embedded development. Requirements: - US citizenship (required by our contracts) - Industry experience in production software development - Embedded cRIO development experience (Real-time and FPGA) - Certification (CLD, CLA, and/or CLED) preferred - Must be meticulous and detail-oriented We offer great benefits, and we prioritize a healthy work/life balance. Learn more about Vertical AIT at www.VerticalAIT.com, and please send resumes to jobs@verticalait.com.
  5. I've got some weird stuff going on with a cRIO project I'm working on wanted to get some opinions on it. The basic architecture is a set of classes that do some process. That process registers with a server. The internal data of the process is held in a DVR and the server get's access to that DVR. Clients use TCP to ask the server to do something, the server makes a call against the classes DVR and returns a response to the client. To simplify the issues I'm seeing I created a class that internally just increments an integer every 500ms. The client asks the server what's the current count, the server asks the Counter class and returns the answer to the client. This works perfectly fine when running the VI in the IDE. When built it connects, will get the JSON message back, but always gets a default value from the DVR call (zero, in this case). As soon as I open a remote debug panel to the cRIO, everything is working. The count is correct, the client calls work, just like normal. As soon as I right-click, close debug, it goes back to zero. Open debug works, close debug, back to zero. I know the DVR isn't getting dropped because the count continues to increment while not in debug, the process is still running happily with no issues. Here's a few screenshots of the code; Count Class process (get the count, increment, write it back to the DVR) - Counter Class process You can see the DVR vi's are actually vim's using a cast. I can't imagine that's the issue. Server Side call - Server Side calls All this does is get the count from the DVR (same as above) and wraps it in JSON and passes it back to the client as a JSON string. I also implemented an Echo class that ignores the process and DVR's, it just takes whatever string you sent form the client to the server and passes it back with a prepended "@echo". This works when running as an executable with the debug turned off so I know the client, server, and the server/class calls are all working as expected. Any thoughts here would be welcome, thanks. edit: I added the any possible errors coming from the variant cast to the JSON reply. When the debug is open there are no errors, when the debugger is closed it throws error 91, but the in-place element structure reading the DVR does not throw any errors. How can a variant not exist until a debugger is opened and than it magically exists? edit: the internal data dictionary is a wrapper around a variant attribute, I wired out the "found?" terminal all the way out to the JSON reply and if the debugger is open the attribute is found, but not if the debugger is closed. Anyone have issues with Variant Attributes in Real-Time?
  6. I use crio-9014 with 6 of NI9505 module to control RM-501 robotic arm. but i have some problem to design suitable architecture: 1.Some component need synchronous. 2.Need to store configure,it can change online. 3.If possible, improve control rate. 4.Some of Data is needed for many component.(Joint Position, Joint Velocity, Cartesian Position, Cartesian Velocity) I decide to use QSM in this application,is this good choice?
  7. Hi. I would like to have the digital trigger high for user input time in seconds. Any help is much appreciated. Data Acquisition Final.zip
  8. Hello everyone, I’m not sure which forum is the right one which is why I created two new topics with the same content (one in Embedded and one in VI Scripting) – so sorry for the spamming. I have two questions: How can I generate a cRIO project programmatically? How can I start the “Discovering Devices” tool of the Project Wizard automatically? At first I will describe a bit more what I really want to do: I’m about to write an auto coder which should create a complete new FPGA project on my cRIO system without any user input. In the Project Wizard I want to run the “System Setup” from NI standalone. In that mask the NI project need some input like project type which is always a cRIO Embedded System. The next step is to insert an IP address to discover an existing system. As those two steps are every time with the same input, I want to give them those parameters so that everything runs automatically. Is there anybody who can help? Thanks a lot!!
  9. Hello everyone, I’m not sure which forum is the right one which is why I created two new topics with the same content (one in Embedded and one in VI Scripting) – so sorry for the spamming. I have two questions: How can I generate a cRIO project programmatically? How can I start the “Discovering Devices” tool of the Project Wizard automatically? At first I will describe a bit more what I really want to do: I’m about to write an auto coder which should create a complete new FPGA project on my cRIO system without any user input. In the Project Wizard I want to run the “System Setup” from NI standalone. In that mask the NI project need some input like project type which is always a cRIO Embedded System. The next step is to insert an IP address to discover an existing system. As those two steps are every time with the same input, I want to give them those parameters so that everything runs automatically. Is there anybody who can help? Thanks a lot!!
  10. Hello everybody, I'm about to write an application that can create a complete new FPGA-Project for the cRIO-system automatically without any user Input. Before I ask my question directly, I will give you a few Information about the system and how it works at the moment. I'm working with a cRIO-system that can have different modules in different slots (max 8). That system should be universally usable which means I can replace one module with another one at the start up and create a complete new project with a different name. Most of the project works (I can find out in which slots which module is placed and load the right VI's correctly) but there is one point which I really dislike: the user always has to give some input Information at the beginning of the creation and mostly that is the same like "Which type of project it should be" or "Which IP address should be used to find the system and the modules for each slot". The goal is that I can write down some specific arguments so the program is created automatically? Or - if there is no way to do this - a way that a second window is shown on screen to help the user through the creation process (for example that tells the user that the system need to be turned on that the project can find every single module)? English isn't my mother tongue, so please apologize if there are any mistakes in my spelling. Thank you very much for your help
  11. I have my CLED practical exam next Tuesday and I'm not sure if I should try to use one of the cRIO example projects that ship with LabVIEW. I have been looking over the sample projects and I can see an awful amount of local and global variables. I want to use an example to save time because I think the exam will be similar to the sample projects but I'm worried I would get penalized for using to many local/global variables. Has anybody had a look at the shipping examples for cRIO like the LabVIEW FPGA Waveform Acquisition and Logging on CompactRIO? What are your thoughts on them? Thanks. Lewis
  12. Hello! I'm trying to use AMQP protocol to send data from a CRIO. I've tried using LabbitMQ and zeroMQ libraries, and when I test it from my computer (windows), it works with no problems. But when I try to put the code on CRIO, there's a lot of errors caused by broken wires. It looks like a .dll or .NET incompatibility. Is there any compatible library for CRIO or some clues about how to make it works?
  13. Hello, I'm currently encountering a problem when accessing FPGA indicator with "Reading/ writing a control" node The FPGA part acquires data every 10µs The RT part Read the indicator every 2000µs But when Running the VIs, I see that the elapsed time between 2 Readings of the indicator change from one iteration to another Can someone help me?
  14. I have a cRIO-9064 with the desktop stand accessory to sell. Where do people sell these things to one another?
  15. Hello i am using cRIO-9066 to produce few analog voltages. I am running crio in scan mode and after i stop running the program, the analog output is still present at the pin. Does anyone know how I could reset the cRIO? Thank you Regards Shravan
  16. Hi all, I am designing the control system for what will be a fairly large machine and I considering the ways the overall system can be architected. I have created systems with a cRIO master and a single cRIO 9144 EtherCAT slave. However I have not tried using multiple EtherCAT cRIOs and/or 3rd party EtherCAT devices like servocontrollers. Has anyone used more than one EtherCAT slave with a cRIO? How many slaves can you realistically daisy chain off one of the newer "value" cRIOs like the 9068? I know this answer will depend on number of scanned variables and the scan engine period. At 10ms scan engine period, what can you expect?
  17. Dear all, I am trying to test the remote panel with web server on LV2015 but it always shows "Server does not support Remote Panel". I have already researched some similar topic but still can not find out the solution for my situation. Now I will show the software system as well as my procedure to make my project. First is the system: Now I shows my steps And this is the disappointed result I am doing the thesis with this. so I need your help urgently :'( Thank you in advance
  18. Hi everyone, I am perceiving some strange behavior in my UDP connections. Every time I re-start my cRIO 9063, the UDP Write block outputs ERROR 66 (LabVIEW: The network connection was closed by the peer. If you are using the Open VI Reference function on a remote VI Server connection, verify that the machine is allowed access by selecting Tools>>Options>>VI Server on the server side.) and it does not transmit. The most bizarre thing is that if I simply stop the execution and re-launch it again (given that I am executing the code of the cRIO in Debug mode from a Windows laptop), the UDP connection behaves perfectly well. The only time it fails is the first time I launch the program after I reset the cRIO. For me, it looks like some service is not properly initialized when the cRIO is started. I attach a picture with the UDP connections of my LabVIEW RT program. The 'Comms RX' VI simply calls the 'UDP Read' function, and the 'Comms TX' calls the 'UDP Write'. The 'Open UDP Conn' also simply calls 'UDP Open'. Can anyone help me?
  19. Still learning about the cRIO, but thought I'd share some of what I've learned recently. Some background on what was going on... We had a driveline failure on two test stands out at customer site. There are sheer pins in the driveline designed to fail rather than send massive torque through a gear set in ways that is just BAD as it can lead to dynamic testing of the hard guarding (which is always fun!). Long story short, there was a failure more of the sheer pins that required detection of the sheer pins breaking. Worst case conditions is the break occurs at 6000 RPM and the only thing that we have already in the system is a 1 mm wide match mark on a 25 mm diameter disk. We found some laser sensors that could pick up the mark and bench tested the system. Everything looked good, so we integrated the bench test in the project, compiled everything and went to update the cRIO. This involved adding C series modules (electrician on site) and remote update of the cRIO application and bitfile through TeamViewer. Lessons learned... 1. Install the NI-RIO driver on a PC connected to the cRIO before it is 1000s of km away. Transferring 4GB of installer over a flakey TeamViewer connection is not recommended. 2. Replication and Deployment (RAD) utility works well for the RT portion, but may not be able to install a bitfile to the FPGA. 3. The example "Get & Set Real-Time System Image" can work when RAD does not. Building the example into an executable that can deploy a selected file is very useful. 4. It is possible to create a image using RAD without errors from an identical cRIO that does not have all of the C series modules. There will not be an error, however the image will not deploy/set (sometimes without an error message). 5. Shared variables can function correctly with different LabVIEW versions (person helping me accidentally converted everything to 2015 for the image that did eventually install). I'm sure I'm missing something, so would appreciate any insight people have.
  20. Hi, My company has been developing and maintaining its own SCADA software in LabVIEW for a few years. It is fairly comprehensive: datalogging, graphing, alarm monitoring, automation, loops for equations and PIDs, and so on. It is a PC-based solution and communicates with many different kinds of hardware through the COM(RS232), USB, and Ethernet ports of the PC. This solution works well and allows keeping the costs low for most of our customers. Most of the loops run around 10Hz (100ms). However, more and more we are running into customer specifications that require high control rate (few milliseconds), high determinism (to the millisecond), and high reliability. Not surprisingly, the PC solution becomes unacceptable. We feel it is time to look into a real-time, embedded solution for those customers. That's why I'm currently investigating the different NI embedded RT solutions (namely PXI and cRIO). I can find plenty of resources on each of them, but close to nothing when it comes to comparing the 2 solutions and choosing which one to go with. Would you mind giving me some guidance? I guess you'll need more information, which I'll be happy to provide. A few elements already: - There is no request for MHz loops, so the FPGA side of the cRIO is not required I believe - Our application contains many VIs that are both the engine and the HMI, so there will be some decoupling effort if we need to split it into an HMI application on the PC and an RT application on the cRIO. Would a PXI solution avoid this issue by plugging a monitor directly to the display port of the controller? But then if I have all the code in the PXI controller, is it likely that I will lose my control rate and determinism? Thanks! Emmanuel
  21. See the attached screen shot. This crashes compilation. "some of the compilation steps were not executed. refer to the Xilinx log†The xilinx log is what looks like hundreds of pages. I see many warnings, but nothing that looks like a critical failure. If I replace the sine wave with the square wave function, the code will run fine. I am running a cRIO-9067, with an NI-9269 module. All I am looking for is a simple output sine wave VI. Freq and amp variable going in, and a waveform out of the RIO. Any help would be greatly appreciated. I have been using NI's examples (http://www.ni.com/white-paper/3780/en/#Example, fig2) linking to my hardware. I suppose I'm looking for a few answers here: 1. Why does this fail compilation? 2. Does anyone have a VI that will just simply output a sine wave? Thanks again, Chris
  22. Hi all, I am trying to get images from a GIGE camera connected to the secondary ethernet port of cRIO 9082. I cannot see my camera in MAX. I have installed NI IMAQdx, NI Vision RT in cRIO. I cannot see NI IMAQ server as an option to install if I go to the custom installation page. Is that the problem? If so how do I get it? P.S: I can see that LabVIEW Real-Time 2013 Support for NI-IMAQ 4.9 is installed in my PC Regards, Prabhu
  23. Hello! Is there anything similar to "DMA MEMORY" that behaves like DMA FIFO, but without the FIFO part? I would like to transfer 1000 bytes of data from the FPGA to the cRIO host and 1000 bytes of data from the host to the FPGA and I don't care about old data - I only need the latest data. Ideally I would like to have two pieces of memory, each 1000 bytes long. One piece that can be written from the FPGA and read from the host and the other piece that can be written by the host and read by the FPGA, so that the first byte of data is always on the address 0. DMA FIFO is not a viable solution, because I would like to get the data as fast as possible, but I can read it on the host only on certain non deterministic intervals. If I would use the DMA FIFO, I would need a huge FIFO to store all the unused old measurements. Thank you for any reply or suggestion. Kind regards, Greg
  24. I'm working with a contractor on a cRIO-based test system, and we are arranging a shared version control scheme so I can work on the code as well. One issue is that there are 2 different cRIO systems operating in completely different network environments, and there are currently 3 different locations where we have to change the IP address between environments: 1. RT controller properties in project 2. A front-panel control on a UI vi that connects to the RT controller 3. A constant in an RT Main vi to set the target for the FPGA BitFile I'd prefer to make this more portable and more easily maintainable in this shared satting under VCS, ideally just popping up a panel that offers controllers to connect to so the operator just clicks on a system to connect to. Desired features would be: 1. Dynamically identifies connected cRIO controllers 2. Offers choice of controller to connect with 3. Remembers last choice with ini file and automatically connects if there is only 1 possible target Thank you for any help. Ryan Rutledge
  25. I am looking to get some design consideration for developing a cRIO motion control application. My questions are 1. Is Softmotion advisable to be used for motion control where the data rate can is upto 20KHz? Not sure if SoftMotion only works with scan engine and according to cRIO developer guide, for rates >500 Hz FPGA should be used and not scan engine. What are the limitations of using Softmotion? 2. In one application can FPGA be used to do I/O with one module and scan engine be used to do I/O with another module? Just wondering how long does it take to develop a LV application with Softmotion if basic motion control is to be performed. Thanks.
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