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Found 8 results

  1. Hello Currently, I stream and proecess audio (for medical purposes) on my PC (i7-4790T with 8 cores) using LABVIEW 2013. To improve performance, the 8 cores could be shared between MS Windows and the real-time operating system RTX by IntervalZero. Please, how can I tell LABVIEW to use the (deterministic) RTX cores instead of the (stochastic) MS Windows cores, to stream audio?
  2. Hi all, I have a question about high level system design with FPGA-RT-PC. It would be great if I can get some advice about ideal approaches to move data between the 3 components in an efficient manner. There are several steps; DMA FIFO from FPGA to RT, processing the data stream in the RT to derive chunks of useful information, parsing these chunks into complete sets on the RT and sending these sets up to the Host. In my system, I have the FPGA monitoring a channel of a digitiser and deriving several data streams from events that occur (wave, filtered data, parameters etc). When an e
  3. Hi everybody, Currently working on VeriStand custom devices, I'm facing a 'huge' problem when debugging the code I make for the Linux RT Target. The console is not availbale on such targets, and I do not want to fall back to the serial port and Hyperterminal-like programs (damn we are in the 21st century !! )... Several years ago (2014 if I remember well) I posted an request on the Idea Exchange forum on NI's website to get back the console on Linux targets. NI agreed with the idea and it is 'in development' since then. Seems to be so hard to do that it takes years to have this simpl
  4. Hi all, I've got a customer that wants to zip/unzip files on their cRIO-9035, so I had them playing with the OpenG Zip tools to see if it would fit their needs. Although they've found that they can zip files on their cRIO just fine, they find that they get disconnected from their RT target and the shell shows the following error message: LabVIEW caught a fatal signal 15.0 - Recieved SIGSEGV Reason: address not mapped to object Attempt to reference address: 0x0x10000000 stdin: is not a tty The zip file they're testing with includes two simple .txt files with short stri
  5. hi i wanna control robatic arm in labview. i have the different parts in vrml and wanna add them together. but don't khow how to do that with NI_picture control/add object ... can anybody help me ? thanks
  6. I would like to use programmatic access to manipulate shared variables on a computer and an NI cRIO 9033, but cannot get programmatic access to shared variables on the cRIO. I have boiled the situation down to a simple example to try to explain what I am seeing. The shared variables are hosted on the cRIO. I am using the same VI to perform the accesses on the computer and the cRIO. On the computer, access to the shared variable via a shared variable node and programmatic access both work. On the cRIO, access to the shared variable via a shared variable node is functional, but programmatic acce
  7. I'm working with a contractor on a cRIO-based test system, and we are arranging a shared version control scheme so I can work on the code as well. One issue is that there are 2 different cRIO systems operating in completely different network environments, and there are currently 3 different locations where we have to change the IP address between environments: 1. RT controller properties in project 2. A front-panel control on a UI vi that connects to the RT controller 3. A constant in an RT Main vi to set the target for the FPGA BitFile I'd prefer to make this more portable and more eas
  8. Here is an interesting topic about adding C-series discovering capabilities to RMC custom boards for SbRIO : http://forums.ni.com/t5/cRIO-Module-Developers-Kit/Can-C-series-module-MDK-can-be-applied-to-SbRIO-mezzanine-card/td-p/1921829 Do not hesitate to post comments on the NI thread or through this forum.
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