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Transferring Data between the FPGA and the Host


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Is there anything similar to "DMA MEMORY" that behaves like DMA FIFO, but without the FIFO part?


I would like to transfer 1000 bytes of data from the FPGA to the cRIO host and 1000 bytes of data from the host to the FPGA and I don't care about old data - I only need the latest data.
Ideally I would like to have two pieces of memory, each 1000 bytes long.
One piece that can be written from the FPGA and read from the host and the other piece that can be written by the host and read by the FPGA, so that the first byte of data is always on the address 0.


DMA FIFO is not a viable solution, because I would like to get the data as fast as possible, but I can read it on the host only on certain non deterministic intervals.
If I would use the DMA FIFO, I would need a huge FIFO to store all the unused old measurements.


Thank you for any reply or suggestion.


Kind regards,



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Thank you for your fast response.


Unfortunately if I use a control/indicator array I am using too much registers and LUTs.
Is there any way around, so that I can put the entire array in a memory block?


Kind regards,


Edited by GoUp
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Yes, you can put the array in a memory block on the FPGA, and then transfer one element at a time to the host using a front panel control. On the FPGA front panel you'll need three elements: an address, a value, and a boolean to signal to read. The host sets the address, then sets the boolean true. When the FPGA sees the true value, it reads the address, retrieves it from memory, writes the value, and sets the boolean false. When the host sees that the boolean is false, it reads the value, then updates the address and sets the boolean true again, etc.

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