crossrulz

There is also the option in VI Properties->Window Appearance to disable "Allow use to close window". My personal preference is to use the Panel Close? event as asbo has already mentioned.

I would definitely be interested. I'm mostly interested in how people get away with using OpenG in their projects since I'm planning on taking up that fight in the next year or so. Anything more would be bonus to me.

I'm assuming I'm supposed to reply here. I currently have permission to go and I just went ahead and registered. We'll see if I will really get to go. As far as OpenG, I currently am not using it for projects due to company rules about open source and third party code. I still find it to be a great resource though. I do have an interest in OpenG, whether using it or helping with development.

How about the actual VI saved in 8.0 ChangeAlias.vi

You could use OpenG's "Get Current VIs Parents Reference" to get a reference to the main VI and then use an invoke node to get/set the control's values using their label. The other option at the top of by head is to make an array of the references to pass into the subVI and the index of which control changed. Then use a for loop to set the others.

Congratulations! I agree more time would be really nice to have with that exam. And I too am trying to convince my work to let me attend the summit (easier said than done).

It's actually not a bug. The case structure is just not range inclusive for strings.

The VIPC will install the version that is needed. So if the VIPC calls for version 1.0 and VIPM sees that version 1.5 is installed, V1.5 will be uninstalled and V1.0 will then be installed. From my understanding, you shouldn't just delete files that VIPM installed. Let VIPM uninstall the files. One of the beauties of VIPM is that packages can have dependencies so you can make sure you have all the code you need.

I'm for the smaller icon personally. Since this VI is called "Clear Specific Error.vi", it should really be "Error Cleared?". For the error array VIs, would it make more sense for this indicator to be an array so the user can figure out which error was cleared?

I just updated my second implementation from above to add a check for an empty array being passed in. So now all errors will be cleared if the array is empty (which is currently the default). Is this a desired feature to clear all errors? Clear error.vi

I've had two versions of the array type. My first attempt uses a for loop. It has the added benefit/feature of inputting an empty array will remove all errors. My second attempt uses the Search 1D Array and check to see if the resulting index is greater than or equal to 0. This should be a little faster than comparing all of the array and OR the results. Similar to Shaun, I made the icons small so I can fit them between property nodes.

I fully understand what you are talking about. I put together something that I was not proud of at all, but I still passed this last month. I could have sworn I put the stupid little comments for "Covers Requirement" for each requirement, but I still lost points there. Anyways, congratulations and I hope to see you at the summit (assuming I'm allowed to go).

Converted to 8.6 Find Arrary Element Clicked On.vi

I recently took the CLA (on the 2nd of this month). My proctor did tell me they changed the format for the CLD in giving the front panel. That could have saved me a good 10-15 minutes back when I took it. For the CLA, I was given the sheet of requirements and a blank USB drive for submission. I thought the CLA was one of the hardest tests I've ever taken, mostly due to the 4 hour requirement. And for what it's worth, I got my results yesterday and I passed!

Kudo up this idea: http://forums.ni.com/t5/LabVIEW-Idea-Exchange/Add-Variant-constant-to-the-Cluster-Class-amp-Variant-function/idi-p/1083987

Hit the diagram cleanup and you'll see exactly what your problem is. It would help you if you changed the direction of the fb nodes (right click option).

Are you dealing with an Invoke Node or a Call Library Function Node? If it is a CLFN, then just double click on the node and there should be a dll location control.

Just open the VIs in LabVIEW 2010 and save. There is also the mass compile option for a little more hands free. You might want to make a backup first just in case.

The frequency domain is made up of positive and negative frequencies. If a signal is real, then X(f) = X(-f). It's just the way the math works. Now since we are dealing with a digital signal, the spectrum repeats every Fs (sampling frequency). So if Fs is 1000Hz, you will see the spectrum that was centered around DC repeat at 1000Hz. If the spectrum bandwidth is greater than the Nyquist rate (Fs/2), then these negative frequencies that I mentioned earlier will show up in the band you are looking at. This phenomenon is called aliasing. So if you have a sine wave at 600Hz and Fs = 1000Hz, you will see a signal alias into the band at 400Hz (1000Hz + -600Hz). If you care about that 600Hz signal, then you need to up your sampling rate (and thereby increase your Nyquist rate). If you don't, filter it out before sampling.

1. That looks like the simulation toolkit is in use. 3. If you go "Tools->Advanced->Edit Palette Set..." there is a palette editor. This is the easiest way to edit the palette in LabVIEW. There is an option to "Place VI Contents". Or the better way would be to use VI Package Manager to create a reuse library. The palette editor in it is second to none IMHO.

Go to VI Properties, select "Window Appearance" from the drop down at the top of the window, click "Customize..." button. There's a checkbox there for "Show Run Continuously button".

Do you see this issue when the enum is not strictly typed (use Type Def instead of Strict Type Def)?

I've been studying up on this as well. My understanding is that for the CLA, you only code what is needed for the architecture. If the XControl is part of the architecture, then make it. If it isn't, don't worry about it. They aren't going to grade you on the use of fancy LV tools, but on the architecture you create and documenting of the requirements.

I'm not a VHDL programmer either. I know just enough to be able to read it...maybe. I just had to interface with other people's FPGAs and microcontrollers that are in the units I had to test. RS-232 was the bus of choice and it proved to work well.

There are FPGAs out there with built in UARTs (or at least an easy interface to one). Using this, I have communicated with FPGAs in our UUT (unit under test) using a simple RS-232 serial port. Other option I have personally done is RS-422. I'm not sure what kind of data rate you need, but these are simple to control (using VISA) and the hardware is cheap (RS-232 port often built into a motherboard).