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LabVIEW IP core reuse


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LabVIEW 2017 has a new feature for FlexRIO and High Speed Serial products that lets you export your LabVIEW FPGA code to a Vivado project which may be what you're looking for. I haven't messed around with the feature too much but when I did, it looked like all of the LabVIEW code you write gets translated to plain text VHDL while the background stuff like PXIe bus communication ends up in the project as encrypted VHDL files.

I haven't used it enough to know exactly what is or isn't encrypted though.

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