Jump to content

A simple method to buffer input


Taylorh140

Recommended Posts

I find myself frequently looking for a good pattern for collecting a pool of array elements until they reach a certain size and then removing the oldest elements first. I have used very stupid methods like a bunch of feedback nodes being fed into an build array node. But today I thought up one that I really enjoyed and I thought that I'd share it. Its a simple pattern and no crossing wires :). Perhaps someone has thought of something better, if so don't hesitate to share.

Example_VI_BD.png

Link to comment

Very neat and postage stamp sized.  There are apparently lots of different ways to perform this and I have yet another way that I've been doing.  This is part of my Force 1D Array Min or Max Size VIM that is part of my array package found here.  I am curious what is the fastest, and under what conditions one works better than another.

Force 1D Array Min or Max Size.png

 

Also somewhat relevant is my Circular Buffer XNodes I made here.  This one uses the shifting method, but tried to be a little more efficient with things like not shifting if it wasn't needed, and if a shift was needed to keep the shifted data so a consecutive read wouldn't require a shift or split and build.

Link to comment

So I did a quick run, and I probably need to state that the above methods cannot really be compared apples to apples. Partially for the following reasons:

  • Some methods only support one element at a time input. If you need to enter 1000 pts at once these methods will probably be slower and involve more operations.
  • Some methods like the circular buffer are much more useful in certain situations like where the buffer is needed in different loops or are acquired at different rates. 

here are numbers for single point(one element at a time) inputs:

How long does it take to process 10000 input samples with a buffer size of 1000 on my computer?: 

  • Taylorh140 => 8.28579 ms 
  • infinitenothing => 2.99063 ms  (looks like shifting wins)
  • Data Queue Pt-by-pt => 9.03695 ms (I expected that this would beat mine)
  • hooovahh Circular Buffer => 8.7936 ms (Nearly as good as mine and uses DVR)

I would consider all these to be winners, except maybe the Data Queue pt-by-pt (but it is available by default which gives it a slight edge), Perhaps ill have to do another test where inputs are more than one sample.

Note: if you want to try the source you'll need the circular buffer xnodes installed.

buffer.zip

  • Like 1
Link to comment

How often you write new elements versus how often you have to read the whole array may also skew the preference given to one scheme. For example, if you write often a single element, just replacing it in place at (i mod N) may be efficient, whereas the readout which involves an array copy may be left with a more expensive solution. This is my go at it, not double checked, may be bugged.

w.pngr.png

  • Like 1
Link to comment
  • 4 years later...
53 minutes ago, Jared Breiter said:

What would these types of buffers be called? I see that these and circular buffer are both FIFO, but the array in a circular buffer is not in time order (the index of the recent value is last vs: always moving right?)

In the case of a circular buffer your "get data" method would deal with the wrap around so would return to the caller data in time order (otherwise what would be the point).

This is a nice use case for a class as you don't really want to expose the implementation to the calling code.

I have something like this

image.png.4e07f73e9e9048f462925b17e3c10342.png

Link to comment

Join the conversation

You can post now and register later. If you have an account, sign in now to post with your account.

Guest
Reply to this topic...

×   Pasted as rich text.   Paste as plain text instead

  Only 75 emoji are allowed.

×   Your link has been automatically embedded.   Display as a link instead

×   Your previous content has been restored.   Clear editor

×   You cannot paste images directly. Upload or insert images from URL.

  • Similar Content

    • By torekp
      I was trying a python http communication tutorial - https://aiohttp-demos.readthedocs.io/en/latest/tutorial.html#views - when I had to disable the NI Application Web Server to proceed.  And then I thought, what the **** am I doing?  Maybe I should take the free (well, prepaid) gift of a working web server.
      Here's my task.  A central HQ computer will have a GUI that monitors five machine stations, each of which has its own computer.  Every approx 10 ms (negotiable), each station gives a report consisting of two arrays, the larger being 2048 data points, the other much smaller.  Whenever HQ feels like it, HQ can tell a station to start or stop (its computer stays on).  A local IP connection is used, with a router at each end.  There is also a Raspberry Pi with its own IP address at each station's router, that can send camera frames to HQ.  The station-computers use Python and C++ to do their work, not counting whatever needs to be added to communicate with HQ.
      Your advice please?  Should I use Labview?  On both ends or just the HQ?  And which if any of these helpful add-ons suggested by Hooovahh should I use?
       
    • By AndyS
      Hi!
      I have to convert a dynamically generated array into a JSON string and back. Unfortunately I found that the un-flatten method loses the variant data. See the screenshot of FP and BD and the comments inside.
      JSON_Text_test.vi
       

       
      Is this a bug in JSON Text or is my data-construction not supported as expected? In case of the letter I have modify huge parts of my code. So I hope that it is a bug 😉
       
      The 2nd thing I recognized is that the name "Value" of the cluster is not used during flatten. Instead the name of the connected constant / control / line is used. I found the green VI ("Set Data Name__ogtk.vi") at OpenG Toolkit that allows me to programmatically set the variant data name. As you can imagine I would prefer not to need the OpenG VI.
       
      Thanks in advance for your kind help 🙂
       
    • By kartik.azista
      HAs anyone tried creating a sub vi programmatically by selecting the set of blocks through scripting?????
    • By TDF
      TDF team is proud to propose for free download the scikit-learn library adapted for LabVIEW in open source.
      LabVIEW developer can now use our library for free as simple and efficient tools for predictive data analysis, accessible to everybody, and reusable in various contexts.
      It features various classification, regression and clustering algorithms including support vector machines, random forests, gradient boosting, k-means and DBSCAN, and is designed to interoperate with the Python numerical and scientific libraries NumPy and SciPy from the famous scikit-learn Python library. 
       
      Coming soon, our team is working on the « HAIBAL Project », deep learning library written in native LabVIEW, full compatible CUDA and NI FPGA.
      But why deprive ourselves of the power of ALL the FPGA boards ? No reason, that's why we are working on our own compilator to make HAIBAL full compatible with all Xilinx and Intel Altera FPGA boards.
      HAIBAL will propose more than 100 different layers, 22 initialisators, 15 activation type, 7 optimizors, 17 looses.
       
      As we like AI Facebook and Google products, we will of course make HAIBAL natively full compatible with PyTorch and Keras.
       
      Sources are available now on our GitHub for free : https://www.technologies-france.com/?page_id=487
    • By mhsjx
      Hi,
      I'm a beginner in labview, and now test cRIO about two weeks. I still can not solve the problem. I attach my test project for explanation.
      I want to realize that , for example, with time sequence t1, t2, t3, t4,  DO outputs T, F, T, F, AO1 outputs A1, A2, A3, A4, AO2 outputs B1, B2, B3, B4, and the delay of AO1 and AO2 should as small as possible(AO1 and AO2 may comes from difference modules).
      I search in Google, NI forum, and decide to use for loop and loop timer in FPGA.
      The reason as follow:
      1. To realize the specific time interval, I can use Wait and Loop timer. But in "FPGA 0--Test DO.vi", it can't not realize specific time interval by several us's error(maybe large). And to complete once of while loop, it needs 134us. I can't explain that it can realize time interval below 134us, even I acturally realize a delay of 10us, but the input is not acturally 10us, so it's not accurate. 
      And by NI example, I use the Loop timer.
      2. In "FPGA 1--Test DO and AO.vi", I find that the loop timer helps me to realize accurate time interval, however, it ignore the first time interval. Such as, t1, t2, t3, t4, with disired output A1, A2, A3, A4. It goes A1(t2), A2(t3), A3(t4), A4(t1). And in "FPGA 2--Test DO and AO.vi", it has same problem. DO0 and AO1 goes A1(t2), A2(t3), A3(t4), A4(t1). And AO0 is always ahead of DO of t1. 
       
      The people of NI forum advice that I should put AO0 and AO1 into one FPGA/IO node and use SCTL. But up to now, I don't find any example about it(Google or NI forum, maybe it's primary).  Mainly that AO0 and AO1 must go with different timeline, the dimension of input array is different.  Can anyone offer advice for me?
      Thanks
      Test.7z
×
×
  • Create New...

Important Information

By using this site, you agree to our Terms of Use.