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Cannot make DStar work


leon43

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My setup is:

 

- PXIe-1082 chasis

- PXIe-7962R FlexRIO

- custom MRF timing card

 

I want to send data via the DStarB line from the custom FPGA to the FlexRIO. I am reading the DStarB line in my LV FPGA program.

 

The problem I have is that I only get the data when the DStarB line goes from '0' to '1'. If I send two '1' after another I only get the first one, because I only recognize the positive front. I would wager that the backplane has a setting for this DStar lines. Some pull-downs or something...

 

I cannot read the VI_ATTR_PXI_DSTAR_BUS and VI_ATTR_PXI_DSTAR_BUS_SET attributes of the PXIe-7962 card from the LabVIEW program. The attributes are also not present in the VISA Interactive control Attributes list.

 

Is there a problem, because the crate is not configured to work with my custom timing card?

Or is the problem in the FlexRIO configuration?

Do I need to enable something in the chassis settings in NI MAX? I went over everything but cannot find something useful.

 

Do I need to configure the backplane with my timing card somehow?

 

I am running out of ideas, so please do help.

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If I understand the article correctly then I have to push the clock out of the DStar A on my timing card to the FlexRIO?

In other words. The FlexRIO DStar B input register is clocked with the DStar A clock?

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This is a little from memory but:

The trigger lines in PXI (and so I am assuming the star triggers too) are fairly dumb. You are setting the state of the line so if your system expects to trigger on a rising edge (which is quite normal for PXI systems) then you would need to pulse the trigger line to work (high-low-high). Just writing a true to it twice is just going to leave it high.

I believe the inputs are just clocked with whatever clock domain you have them on the FPGA. The clock sharing in the article appears to be referring to data acqusition clocks but this shouldn't be needed for a simple trigger.

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